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Encounter 8.1 vs 9.1 sdf generation

MzQuarter

Hi,

I've used Encounter 8.1 for past projects to generate sdf back-annotation for simulation and it worked great. Now we've moved to Encounter 9.1, but the exact same 8.1 encounter project reloaded in 9.1 gives different results. First of all, the middle field ("typical", my guess) is no longer present, and when I load the sdf in a simulator the delays are all taken as 0 (no delays).  Second, the delays for interconnect are different, and quite often 0. Another difference I noticed is that in 8.1 the value triplets were always the same (which I thought odd), but not in encounter 9.1.

What am I missing? I'm almost sure it's just a setting, but I can't see where or how.

Thanks.

--------------------------------------------------------------------------------
Encounter 8.1:

(INTERCONNECT I_NCS U134/A (0.0037:0.0037:0.0037) (0.0037:0.0037:0.0037))
(INTERCONNECT I_SCLK Q_TRANSACTIONCOMPLETE_REG/CKN (0.0045:0.0045:0.0045) (0.0045:0.0045:0.0045))

Encounter 9.1:

(INTERCONNECT I_NCS U134/A  (0.003::0.004) (0.003::0.004))
(INTERCONNECT I_SCLK Q_TRANSACTIONCOMPLETE_REG/CKN  (0.000::0.000) (0.000::0.000))

Parents

  • Hi diablo,

    Thanks for the info.

    Let me clear up my intent, it might help. Before starting on the real design layout, I'm doing a first run around the whole back-end process using a very small project to iron out any problems I might run into. It real project is mixed signal, with many small analog instances at the bottom of the hierarchy and the digital parts wrapping the top. I've worked through a basic assembly flow, and I am currently working on simulation with layout parasitics. I was hoping to look into MMMC and thermal/power analysis at a later time, because my test circuit seems a little too simple to have much self-training value for these features. Also, I don't think I can do full parasitics extraction directly in Encounter because of the custom analog blocs. However, I can produce DSPF or SPEF files for the digital portion of the mixed-signal design outside encounter, and import the result to calculate the delays.

    When simulating, I don't remember giving a particular corner (or three. I use AMS for mixed signal), but I am currently aiming for a simple bcwc to start with. But if I can, I'd rather do it right on the first go so I won't have to come back and rework the procedure. From what I understand, you can only run one corner at a time, and let the hold/setup checks do the work of flagging errors for each corner setting. But then, for a simulation aiming to verify the mixed-signal circuit in typical conditions,  I'd need the typical values, so I would need to run MMMC right away?

    Another question, to make sure : Should I expect problems when running MMMC with imported parasitics? I won't need to generate a SPEF file for each corner, right? The software will pick the right model when calculating the delays?

    Am I thinking in the right direction?

    Thanks

     

Reply

  • Hi diablo,

    Thanks for the info.

    Let me clear up my intent, it might help. Before starting on the real design layout, I'm doing a first run around the whole back-end process using a very small project to iron out any problems I might run into. It real project is mixed signal, with many small analog instances at the bottom of the hierarchy and the digital parts wrapping the top. I've worked through a basic assembly flow, and I am currently working on simulation with layout parasitics. I was hoping to look into MMMC and thermal/power analysis at a later time, because my test circuit seems a little too simple to have much self-training value for these features. Also, I don't think I can do full parasitics extraction directly in Encounter because of the custom analog blocs. However, I can produce DSPF or SPEF files for the digital portion of the mixed-signal design outside encounter, and import the result to calculate the delays.

    When simulating, I don't remember giving a particular corner (or three. I use AMS for mixed signal), but I am currently aiming for a simple bcwc to start with. But if I can, I'd rather do it right on the first go so I won't have to come back and rework the procedure. From what I understand, you can only run one corner at a time, and let the hold/setup checks do the work of flagging errors for each corner setting. But then, for a simulation aiming to verify the mixed-signal circuit in typical conditions,  I'd need the typical values, so I would need to run MMMC right away?

    Another question, to make sure : Should I expect problems when running MMMC with imported parasitics? I won't need to generate a SPEF file for each corner, right? The software will pick the right model when calculating the delays?

    Am I thinking in the right direction?

    Thanks

     

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