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assign statement check

tiEngr

Hi All,

Is there a way to check en encounter if there is any assign statement present in the DB. Lets assume we didnot use setDoAssign and set rda_Input(assign_buffer)   {1} variable.  I dont see any thing in checkDesign or checkNetlist

Thanks
Parents
  • Hi, Assign statements should be removed well before loading the design into database. If at all assign statements are present in the design,we cannot estimate the actual area of the design, second thing is that the tool cannot understand the "assign" and may unable to perform.
Reply
  • Hi, Assign statements should be removed well before loading the design into database. If at all assign statements are present in the design,we cannot estimate the actual area of the design, second thing is that the tool cannot understand the "assign" and may unable to perform.
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