Help: SOC Encounter DEFout and Virtuoso DEFin

 Hi,

 Using a DEF is not a typical way to get your design from Encounter to Virtuoso. I always use Encounter's streamOut command to transfer gds. You could also use OA I believe. Check the Encounter user guide for either one of these methods. It may take some setup, but you'll get much better results.

 - Kari

Thank you very much for your reply, Kari.

Since I only have the standard cell library without the abstract view, will that affact the StreamIn?

 Another question is that the Cadence available to me at this moment is IC5141, is OA still an option?

 Thanks!

 I don't think you need the abstract view. They layout is what's important, and that's all I ever use.

 I don't have any experience with OA, but as far as I know, it was available in 5141.

 Hi Ruri,

I use DEF to import digital blocks to be placed in mixed-signal designs in Virtuoso. The via information should be defined in the techfile of the library that you are importing the design into (or in the techfile that the library is attached to). The warnings you see means that the techfile needs to have the via definitions added.

You can still import the design without having abstract views. In the import DEF form (File->Import->DEF), there is a field called "Component Master Views". Put "layout" in this field and it will use the layout views when importing instead of abstract views. 

Thanks, Kari and Scrivner.

Kari - I will try the GDS streamOut from Encounter later, since I do not have the streamOut map file at this moment ...

 Scrivner - I checked the library and tech file you mentioned, they do not have the Via information, as you said. But the via information from Encounter is so weird - the names are like VIA12_1CUT_H ... VIA23_1CUT_FAT_C ... really don't know where to find libs having such definitions ... could you please give me a hint?

Hi Scrivner,

 I just tried to add "layout" in the field of "Component Master Views," and it did show the standard cell layout in the Virtuoso this time, but all the standard cells are somehow misplaced and overlapped ... The log file has the warning of:

\w *WARNING* Cellview (XXXX layout) has no cell boundary!

......

BTW, I still got no vias ...

Thank you,

Ruri  

Hi Ruri,

About the vias - the LEF used by Encounter defines vias. The via definitions can include what's called "generated vias" which is a sort of a bit of code that  tells Encounter how to build vias that it needs. When it builds these vias it names them with these odd names. In order to import the DEF into a Virtuoso layout, the techfile for the library you are importing must have the same via definitions that are in the LEF file. So it sounds like your techfile does not have the vias defined.

The problem with overlapped cells is that there is no prBoundary layer defined in the layouts of the cells according to the warning.

So it looks like import using DEF is not a good option since your cell library and techfiles are not set up to support it. It sounds like you are going to have to use GDS stream for import/export.

Hi Scrivner,

Thank you very much for your detailed explaination.

I just did the streamOut and streamIn, and succeeded so far. I got another question - how to proceed with the LVS with Assura or Calibre? given I only have the functional view by importing (Verilog In) the structural verilog file from SOC Encounter? shouldn't I need the schematic view to proceed with the LVS?

 Thank you again,

Ruri

 LVS is Layout Vs Schematic. You'll be comparint the GDS (layout) to the schematic (verilog netlist).