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  3. how could FE extract coupled C when doing timeDesign?

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how could FE extract coupled C when doing timeDesign?

archive
archive over 17 years ago

Hi,All based a routed design,when i do timeDesign,FE extracts RC,below is a part of the log: Nr. Extracted Resistors : 1721541 Nr. Extracted Ground Cap. : 1821440 Nr. Extracted Coupling Cap. : 0 actually,it's not what I expected,i wanna coupling cap be expected. i try to setExtractRCMode -coupled true,it does not work,and after doing timeDesign,the -coupled is false when getExtractRCMode.. so ,could anyone help,thanks in advance.


Originally posted in cdnusers.org by yhu
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  • archive
    archive over 17 years ago

    To extract coupled cap. during time design, You need to enable -si option of timeDesign.


    Originally posted in cdnusers.org by Devi
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  • archive
    archive over 17 years ago

    To extract coupled cap. during time design, You need to enable -si option of timeDesign.


    Originally posted in cdnusers.org by Devi
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