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  3. Fixing max transition violation

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Fixing max transition violation

mwhite
mwhite over 14 years ago

 Hello,

 We get  max transition violations after RC extraction analysis.  They don't show up during P&R optimizations.  All of the violation nets are high buffer nets but not clocks.  One is a reset and the others are not clock or reset.  The violating nets don't necessarily have the highest fanout.

I read in the Forum that it may not be the best to insert high buffer trees on these nets.  What will be the best way to fix this?

Thanks!

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  • mwhite
    mwhite over 14 years ago

     Hi Kari,

    Thank you for quick answer.

    They are all high fanout transition nets but not necessarily the highest.  We don't have any max_fanout set for the design.  I thought this might be an option for fix, what do you think?

    We are using VDIO license and can only run TQRC within the Encounter tool.  Right now we are planning to use it for sign-off as our design is relatively small and simple with 90nm technology.  We are using the QRC techfile provided by the foundry for RC extraction.  Do you see any issue with our flow?

    At this moment, buffer trees are added only to clocks.  I read somewhere in the forum that it might be better to let the tool to do high net buffer optimization than building high buffer net trees even on reset.  Why is it so?  For power?

    Thank you!

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  • mwhite
    mwhite over 14 years ago

     Hi Kari,

    Thank you for quick answer.

    They are all high fanout transition nets but not necessarily the highest.  We don't have any max_fanout set for the design.  I thought this might be an option for fix, what do you think?

    We are using VDIO license and can only run TQRC within the Encounter tool.  Right now we are planning to use it for sign-off as our design is relatively small and simple with 90nm technology.  We are using the QRC techfile provided by the foundry for RC extraction.  Do you see any issue with our flow?

    At this moment, buffer trees are added only to clocks.  I read somewhere in the forum that it might be better to let the tool to do high net buffer optimization than building high buffer net trees even on reset.  Why is it so?  For power?

    Thank you!

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