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timingSelfLoopsNoSkew

Scrivner

Has anyone tried using the  "-timingSelfLoopsNoSkew true" option with setAnalysisMode?

I have a handfull of flops that are showing hold time violations but the timing path on each is between it's own input and output. In the timing report, the clock paths are reported as exactly the same, but the timing on each path is different for some reason.

Encounter documentation for "-timingSelfLoopsNoSkew true" in setAnalysisMode say the option:

"Eliminates clock skew due to clock uncertainty for a path starting and ending at the same register."

But my timing report is exactly the same regardless of whether I set this option to true or false. The hold violation gets flagged either way.

  • Is the clock uncertainty the source of the difference in the path? You could also try:

    set_global timing_cppr_self_loop_mode true


     

  •  Hi Kari - sorry for not responding sooner but we've been working on getting a tapeout completed.

    Both clock paths shown by the report are exactly the same physically. They have slightly different timings that is not related to the clock uncertainty. For example, element clk_L1_I1 in the launch path has a slightly different prop delay from the same element clk_L1_I1 in the capture path (I don't know why this is the case, but I see this happen all the time). Cppr is set to both so it shouldn't be that either. I tried your suggestion of setting the global mentioned but it had no effect. Thanks for the suggestion though.

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