PVS-LVS

Hi Kari,

Im ruuning by command line only

pvs -64 -lvs -gds clu.gds.gz -ascrdb clu.db -top_cell clu -spice clu.spi -verilog clu_lvs_new.vg -hcell hcell.txt -source_cdl sub.cdl -layout_top_cell clu -source_top_cell clu -sum clu.sum DFM_LVS_CAL_N65_ALRDL_noU_13b.7m | & teelog_file

this is the command im using , im seeing in .cls file for mismatches i found all filler cells as mismatched in layout.but i opend the .gds file in virtuso there im seeing filler cells what might be the reason for mismatch of fillers?

what is the best way to analyse and debug the lvs reports?

Hi,

 When we output the physical verilog for LVS, we leave out the filler cells. I'm not sure what tool you're using to generate the physical verilog, but the command in EDI would look something like this:

 saveNetlist design.phys.v -phys -excludeLeafCell -excludeCellInst FILL64 -excludeCellInst FILL32 -excludeCellInst FILL16 -excludeCellInst FILL8 -excludeCellInst FILL4 -excludeCellInst FILL2 -excludeCellInst FILL1

- Kari

Hi Kari,

Why we need to exclude the FILL*(*=16,8,4,2,1)  is there any specific reason?

Hi Kari,

Im using in lvs command like -spice <block name>.spi what this switch used for, it generates spice netlist right , from layout or from schematic?

The FILL cells are physical-only cells, they are not connected to anything in the netlist.

-spice <filename> should give you the spice file that PVS generates from the layout. I typically don't generate this, unless I'm trying to track down something specific to compare to the .cdl that was created from the physical verilog.

Hi Kari,

 Still i didnt clear how lvs works, when we are saving gds in EDI it also saves FILL* information right, and morover FIll* are used for implant and well continutiy right, if we exclude FILL in SaveNetlist Command then in scematic it wont save FILL information, but in layout still we will have the FILL information, in this case will it wont show any  mismatches for FILL(As it sees FILL information in GDS and it wont see FILL information in netlist i meen in schematic)

I'm somewhat new to the details of LVS myself, so I'm not sure how to explain it properly. I just know this is how we've always done it. I think it's because the fillers don't have any logical netlist connection. They continue the rails and wells, but can sort of be "flattened" from that point of view, if that makes any sense. Sorry I'm not very good at explaining this one!