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Missing power net

schnufff

 Hi all,

 I changed my flow from dc_shell to rc. In the past, when I imported my design to Encounter, there was the option to specify power and ground nets(import design->advanced->power). Now I import my RTL code and let rc synthesize it. But in contrast to dc, now 2 of my four power nets are missing. My IO-pads have pins vdd_core,vss_core,vdd_io,vss_io defined in the lef file. But only the global nets for  vdd_core and vss_core are created by rc. Therefore I am unable to connet the pins to the non-existent nets. I tried to instanciate the nets by hand (wire vdd_io;), but this doesn't work. Is there a way to create the two nets vdd_io,vss_io after the rc run, so that encounter can work with them?

The pin are defined like bleow in the lef file:

MACRO IO_Cell
 PIN vss_io
 END vss_io
PIN vdd_io
 DIRECTION INOUT ;
 USE POWER ;
 END vdd_io
PIN vss_core
  DIRECTION INOUT ;
  USE GROUND ;
  END vss_core
END IO_Cell

 

Regards

stefan

Parents
  • Power and ground nets are not typically in the netlist. These are usually handled in EDI with the globalNetConnect statement. The LEF pwr/gnd pins should all be direction INOUT and USE POWER or USE GROUND as appropriate.
Reply
  • Power and ground nets are not typically in the netlist. These are usually handled in EDI with the globalNetConnect statement. The LEF pwr/gnd pins should all be direction INOUT and USE POWER or USE GROUND as appropriate.
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