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  3. density increase by 15% after postcts hold optimization

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density increase by 15% after postcts hold optimization

jabbar
jabbar over 13 years ago

Hi,

I'm having problem with the high increase of utilization (from 70% to 85%) when I run optdesign -postcts -hold command in soc encounter. Could anyone please let me know what would be the reason of such dramatic increase of the number of buffer to fix hold violation?

My input delay constraint is about 15% (0.5 ns) of the clock period (3 ns). 

Thanks in advance.

 

 

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  • jabbar
    jabbar over 13 years ago

    Thank you Tongju and BobD for the suggestions. I have solved it by analyzing the violated paths through "timing analyzer path" from global timing debug menu (setup check). Then I modified my constraints (SDC) and repeat the synthesis and place and route without any significant increase of density after optdesign -postcts -hold command. There is no problem with the clock tree, it is the problem of my constraints, specifically IO constraints.

    Can you please tell me how can I view histogram of hold time using timing debug in encounter. I have gone through the timing debug chapter in SOC guide but still dont know how to do that. I tried such as follows:

    ----------------

    create_path_category -name {test} -comment {}

    -check_type {{Hold Check}}

    -from_port all_inputs

    -to_cell all_registers

    ------------------------- 

     

    but the encounter gives this info:

    ------------------------

    INFO(create_path_category) : no paths met the criteria defined for group "test", so the group was not created.

    -------------------------
     
    Can you please guide me on how to do that?
     
    Thanks in advance. 

     

     

    Thanks again.

      

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  • jabbar
    jabbar over 13 years ago

    Thank you Tongju and BobD for the suggestions. I have solved it by analyzing the violated paths through "timing analyzer path" from global timing debug menu (setup check). Then I modified my constraints (SDC) and repeat the synthesis and place and route without any significant increase of density after optdesign -postcts -hold command. There is no problem with the clock tree, it is the problem of my constraints, specifically IO constraints.

    Can you please tell me how can I view histogram of hold time using timing debug in encounter. I have gone through the timing debug chapter in SOC guide but still dont know how to do that. I tried such as follows:

    ----------------

    create_path_category -name {test} -comment {}

    -check_type {{Hold Check}}

    -from_port all_inputs

    -to_cell all_registers

    ------------------------- 

     

    but the encounter gives this info:

    ------------------------

    INFO(create_path_category) : no paths met the criteria defined for group "test", so the group was not created.

    -------------------------
     
    Can you please guide me on how to do that?
     
    Thanks in advance. 

     

     

    Thanks again.

      

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