Move Clock Tree buffers after Integrated clock gate cell...
Digital Implementation Forums
Move Clock Tree buffers after Integrated clock gate cell in clock tree
over 4 years ago
I have inserted integrated clock gate cells in my design in DC and during clock tree synthesis, Encounter inserts the CLK buffers before the clock gate. This causes the buffer to run, when there is no clock required. ANyone know how to move the clock buffers after the clock gate cells, so that they switch only when the circuit needs clock and save power. I am using SoC Encounter.
over 4 years ago
If the integrated clock gating (ICG) cell is capable of directly driving all it's leaf cells without any max cap, tran or fanout violations, normally you would not save any power by moving the ICG tap off point further up the clock tree.
Think of it this way, if the main clock was going to be routed there anyway what power are you going to save by routing two separate clocks to cover the same area?
It is a different story if you have multiple "equivalent" ICG cells that can be merged with ckDecloneGate, you "may" save power by tree distributing the gated clock separately if it is going to a relatively isolated / concentrated area.
One of my current blocks has 32 unique ICG cells, BUT all the leaf cells are all intermixed , there is no way I could possibly CTS 32 essentially parallel clocks, I had to clone and push the ICG cells to the very bottom (leaf driver) of the tree with ckCloneGate.
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