Stats

  • Locked Locked
  • Replies 12
  • Subscribers 94
  • Views 10561
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to write sdc for pre/post CTS ?

yamakazu

I want to set different clock uncertainity values in the same sdc file for both pre and post CTS modes. Can I do that ? The following sdc didn't work. How to do that ?

if {[getAnalysisMode -clockPropagation -quiet] == "forcedIdeal"} {
    set jit_add 0.2
} else {
    set jit_add 0
}
set_clock_uncertainty [expr 0.200+${jit_add}] \
  -from [get_clocks {my_clk}] -to [get_clocks {my_clk}]

Parents
  • yamakazu

    Hi Shawn,

    I understand what you said. Thank you for your help.

Reply
  • yamakazu

    Hi Shawn,

    I understand what you said. Thank you for your help.

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.