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Voltus power analysis

kenambo

Hi All,

        I have a whole design of test chip which has analog block as a hard macro. While trying to do power analysis of the whole design, I got an error for the included macro.

I think it is because of the input file required. It requires spice subcircuit file. Is this extracted netlist? or some other thing. Please clarify.


And the power pin for which I am going to analyze power is in Macro level only It is not connected to any top level pins. So is it possible to do power analysis for this macro in VOLTUS environment?

If it is possible How can I do this?

Thanks.

Parents
  • i'm not really sure if i understand your question. if you want to analyze power inside the macro, you should probably do that at the macro level. if you are analyzing at the test chip level, and don't really care about the macro, then you can make a basic model for the macro that uses the LEF and you won't need the spice for it.
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  • i'm not really sure if i understand your question. if you want to analyze power inside the macro, you should probably do that at the macro level. if you are analyzing at the test chip level, and don't really care about the macro, then you can make a basic model for the macro that uses the LEF and you won't need the spice for it.
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