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Voltus power analysis

kenambo

Hi All,

        I have a whole design of test chip which has analog block as a hard macro. While trying to do power analysis of the whole design, I got an error for the included macro.

I think it is because of the input file required. It requires spice subcircuit file. Is this extracted netlist? or some other thing. Please clarify.


And the power pin for which I am going to analyze power is in Macro level only It is not connected to any top level pins. So is it possible to do power analysis for this macro in VOLTUS environment?

If it is possible How can I do this?

Thanks.

Parents

  • Hi Kari,

         Yeah I want to analyze it in test chip level not in macro level. The scenario is I want to analyze the macro which is embedded in the test chip level. So to do this I need spice subcircuit file right?

    My question is what does this spice subcircuit file stand for? Is it extracted spice netlist of the macro? or anything else? Hope my question is clear. I just need to make sure the input files to analyse the macro power grid.

    Thanks

Reply

  • Hi Kari,

         Yeah I want to analyze it in test chip level not in macro level. The scenario is I want to analyze the macro which is embedded in the test chip level. So to do this I need spice subcircuit file right?

    My question is what does this spice subcircuit file stand for? Is it extracted spice netlist of the macro? or anything else? Hope my question is clear. I just need to make sure the input files to analyse the macro power grid.

    Thanks

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