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Voltus power analysis

kenambo

Hi All,

        I have a whole design of test chip which has analog block as a hard macro. While trying to do power analysis of the whole design, I got an error for the included macro.

I think it is because of the input file required. It requires spice subcircuit file. Is this extracted netlist? or some other thing. Please clarify.


And the power pin for which I am going to analyze power is in Macro level only It is not connected to any top level pins. So is it possible to do power analysis for this macro in VOLTUS environment?

If it is possible How can I do this?

Thanks.

Parents
  • so it sounds like you want to analyze the design flat. I don't have experience doing this with analog macros. I think you can either analyze flat (not sure what data you need for the analog piece) or you can create a power-grid-view of the analog macro to use while analyzing the top-level. I *think* Voltus-Fi is what is used to create a PGV of the analog macro, but as I said, I don't have experience in this area.
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  • so it sounds like you want to analyze the design flat. I don't have experience doing this with analog macros. I think you can either analyze flat (not sure what data you need for the analog piece) or you can create a power-grid-view of the analog macro to use while analyzing the top-level. I *think* Voltus-Fi is what is used to create a PGV of the analog macro, but as I said, I don't have experience in this area.
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