No buffers added in power domain, hold violation

I have specified two power domains, PD_CORE and PD_ACC. PD_CORE is the default and seems to work fine.
However, the second power domain, PD_ACC, causes some issues. PD_ACC is defined to a certain area, thus causing PD_ACC to have the attribute fence.

I have specified libraries for both domains, however when running CTS, I notice that no buffers or inverters are placed in this domain.
This leads to hold violations in PD_ACC, that can't be fixed since no buffers are added.

I could be incorrect, but as far as I understand this is done in the CPF, and was done as follows

-----------------------------------------------------------------------------
define_library_set -name TT_LIB -libraries $PATHS_TO_MY_LIBRARIES
set_design $init_top_cell
create_power_nets -nets {VDD_NET VDD_ACC}
create_ground_nets -nets {VSS_NET}
create_power_domain -name {PD_CORE} -default
update_power_domain -name PD_CORE -primary_power_net VDD_NET -primary_ground_net VSS_NET -nmos_bias_net VSS_NET -pmos_bias_net VDD_NET
create_power_domain -name {PD_ACC} -instances $ACC_INST
update_power_domain -name PD_ACC -primary_power_net VDD_ACC -primary_ground_net VSS_NET -nmos_bias_net VSS_NET -pmos_bias_net VDD_ACC
create_nominal_condition -name TT -voltage 0.80
update_nominal_condition -name TT -library_set "TT_LIB"
create_power_mode -name PM_0P80 -domain_condition {PD_CORE@TT PD_ACC@TT} -default

<creating global conditions>
..
end_design
-----------------------------------------------------------------------------

In cc_opt_mode, I have specified the cells to be used for -cts_inverter_cells, -cts_buffer_cells, and -cts_clock_gating_cells.
The command  `get_ccopt_property buffer_cells -power_domain PD_ACC` returns the list of buffers as expected.

After running
create_ccopt_clock_tree_spec
ccopt_design -outDir RPT/innovus -prefix cts

I do `selectInstByCellName *CKBUF*, and see how buffers have been placed in all areas but the PD_ACC area - which is a bit concerning.

During `optDesign -postCTS -hold -outDir RPT/innovus -prefix -postcts_hold` i get the following

-----------------------------------------------------------------------------
**WARN: (IMPCCOPT-1182): The clock_gating_cells property has no usable full-cycle clock gates for power domain PD_ACC.
..
..
For power domain PD_ACC:
For power domain PC_CORE:

Buffers: {<list of buffers>}
Inverters: {<list of inverters>}
Clock gates: {<list of clock gates>}

-----------------------------------------------------------------------------

I assume that I am missing something crucial? I would very much be interested in finding out why the tool believes that the list of buffers, inverters and clock gates, are empty for PD_ACC, as shown in the log above.
Any help in the right direction would be appreciated!

Thank you in advance

INNOVUS 21.11