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Directed vs Random Testing

FormerMember
FormerMember

Hi

I am writing a paper looking at "myths" in functional verification. By "myth" I mean the types of things which people take as accepted truth even though there may not be much evidence to back them up. So, is the death of directed testing one such myth?

My opinion is:
- random has replaced directed as the preferred test methodology at block level (and if you want a directed test you do that via your random test bench)
- but at chip level there is still a lot of directed mainly for many reasons - the main ones being more legacy of test benches at chip level and legacy of thought (i.e. we must see the chip do this before we ship), you want to see specific integration scenarios (although random + coverage could do that too), and because you are often doing HW + SW coverification where directed is more usual

I'm looking for an active discussion plus references to good articles or papers on this topic please

Thanks

Mike Bartley

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