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reversed part select index expression ordering

Hello,

I use NCverilog to do the simulation. and got erros in ncelab.log as follow:

ncelab: *E RNGDIR (../simprims/X_ARAMB36_INTERNAL.v 2182 | 23) reversed part select index expression ordering [4.2.1 [ IEEE]]

doa_ltmp[7:0] = mem[addra_tmp[14:4]] [7:0];

Is there something wrong in the ARMB36 model or in my simulation tool, can anybody help me? !!!

Thanks!

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Shalom B over 16 years ago

linseed said:

doa_ltmp[7:0] = mem[addra_tmp[14:4]] [7:0];
Apparently, addra_tmp is declared from low to high, whereas you have written a part-select of [14:4], from high to low.
Shalom
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Shalom B over 16 years ago

linseed said:

doa_ltmp[7:0] = mem[addra_tmp[14:4]] [7:0];
Apparently, addra_tmp is declared from low to high, whereas you have written a part-select of [14:4], from high to low.
Shalom
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