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Clocking blocks /cycle based sampling and driving

hipooja

Hi,

I read that clocking block / cycle based simulation in SV promotes reusability.Why is that so? I understand that interface definition simplifies the signal connection  How does this promote reusability?

Regards,

Pooja Vaishnav.

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  • hipooja

    I figured out that modports are the first step to reusability ,suppose there is a master and slave wherein only the direction of signal is different,then all you need to do is bunch the signals and define directions in modport and pass the modport to the constructor of the master and slave module,hence it spares the effort of defining the signals again in each module ,their direction and connections.This promotes reusability because as you said ,if signals change all you need to do is edit the interface,the same testbench code can be used incase only the signals have changed.If I2C interface is used connecting host to TX chip and the RX chip ,all you need is to define a single I2C interface and plug it to the TX,RX and host.

     

    Secondly i learnt that clocking blocks seperate signal timing as the interface where they are defined ,contain the typical sample-hold time of the signal,thus the coder does not need to worry about this /clocking event ,all he /she needs to do is focus on the functionality.

     

    Regards,

    Pooja

Reply
  • hipooja

    I figured out that modports are the first step to reusability ,suppose there is a master and slave wherein only the direction of signal is different,then all you need to do is bunch the signals and define directions in modport and pass the modport to the constructor of the master and slave module,hence it spares the effort of defining the signals again in each module ,their direction and connections.This promotes reusability because as you said ,if signals change all you need to do is edit the interface,the same testbench code can be used incase only the signals have changed.If I2C interface is used connecting host to TX chip and the RX chip ,all you need is to define a single I2C interface and plug it to the TX,RX and host.

     

    Secondly i learnt that clocking blocks seperate signal timing as the interface where they are defined ,contain the typical sample-hold time of the signal,thus the coder does not need to worry about this /clocking event ,all he /she needs to do is focus on the functionality.

     

    Regards,

    Pooja

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