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ahb evc: Hw can I do a random back to back transfer with random address

Anukrishnan
Anukrishnan over 14 years ago

Hi ,

I want to do a random back to back transfers, by constraining the ahb evc in specman.Basically I need the htrans as 2-0-2-2-2-2-0-2-0-2-2-2-2-  etc  with random address .So how can I constrain the ahb-evc  to get a sequence like this? Thanks in advance.

 

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  • J1EM1N
    J1EM1N over 8 years ago

    Hi, thanks in advance. I have a similar question.

    I want to send multiple SINGLE bursts with no intervals in between. like 2-2-2-2-2-2-2-2...

    However, when I use the following source code, I got a couple of IDLE cycles like 2-2-0-2-2-2-0-2-0-2..., and I don't understand why. Can you help me?

    (I am using non_blocking_write api instead of do burst, so there will be no 1 cycle loss between bursts.)

    struct ahb_trans{

    trans_type : vr_ahb_burst_kind;
    trans_dir : vr_ahb_direction;
    trans_size : vr_ahb_transfer_size;
    trans_addr : vr_ahb_address;
    trans_data : vr_ahb_data;

    };

    extend vr_ahb_master_seq_kind : [ MY_SEQ ];

    extend MY_SEQ vr_ahb_master_seq {

    !ahb_trans;

    for i from 0 to 10 {

    gen ahb_trans;

    non_blocking_write( ahb_trans.trans_addr,
                                         {ahb_trans.trans_data},
                                          ahb_trans.trans_type,
                                          ahb_trans.trans_size);

    };

    };

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  • J1EM1N
    J1EM1N over 8 years ago

    Hi, thanks in advance. I have a similar question.

    I want to send multiple SINGLE bursts with no intervals in between. like 2-2-2-2-2-2-2-2...

    However, when I use the following source code, I got a couple of IDLE cycles like 2-2-0-2-2-2-0-2-0-2..., and I don't understand why. Can you help me?

    (I am using non_blocking_write api instead of do burst, so there will be no 1 cycle loss between bursts.)

    struct ahb_trans{

    trans_type : vr_ahb_burst_kind;
    trans_dir : vr_ahb_direction;
    trans_size : vr_ahb_transfer_size;
    trans_addr : vr_ahb_address;
    trans_data : vr_ahb_data;

    };

    extend vr_ahb_master_seq_kind : [ MY_SEQ ];

    extend MY_SEQ vr_ahb_master_seq {

    !ahb_trans;

    for i from 0 to 10 {

    gen ahb_trans;

    non_blocking_write( ahb_trans.trans_addr,
                                         {ahb_trans.trans_data},
                                          ahb_trans.trans_type,
                                          ahb_trans.trans_size);

    };

    };

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