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  3. initial statement issue in IFV

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initial statement issue in IFV

DouglasYaya
DouglasYaya over 11 years ago

Dear Sir/Lady:

I have a question while using IFV, there is a simulation model in my design, after running the verification flow for several cycles, I did not find PRINET was set to  1b'1, this seems to be the issue related with initial statement, I do not know how to slove, could you help me? Thank you!

  =========================Command Line=========================

 iev +64bit *.sv +tcl+sim.tcl +covoverwrite +coverage+all

 =========================simulation model=========================

 module PRI(PRI);
  input PRI;
parameter RST_PULSE = 1;

reg PRINET;

initial
begin
 PRINET = 1'b0;
 #RST_PULSE
 PRINET = 1'b1;
end

endmodule

=========================TCL script file=========================

clock -add  ck  -initial 1  -width 1  -period 2 


force   sp  1'b1
force   cd  1'b0
force   d   1'b1

run 6

init -load -sst2 douglas.shm

init -show

constraint -add -pin sp 1'b1

constraint -add -pin cd 1'b0

constraint -add -pin d  1'b1

assert -add -block

assert -add -fsm

define constraint_trace on

define witness_check trace

prove

 

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  • TAM1
    TAM1 over 11 years ago

     IFV workd with a model built from the synthesized RTL design. Initial blocks are ignored by IFV because they are not part of the synthesized circuit. The workaround is to add the statements to your initialization sequence and constraints.

     

    force PRINET 0
    force resetn 0
    run 2
    const -add -pin resetn 1 -reset
    const -add -pin PRINET 1'b1

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  • TAM1
    TAM1 over 11 years ago

     IFV workd with a model built from the synthesized RTL design. Initial blocks are ignored by IFV because they are not part of the synthesized circuit. The workaround is to add the statements to your initialization sequence and constraints.

     

    force PRINET 0
    force resetn 0
    run 2
    const -add -pin resetn 1 -reset
    const -add -pin PRINET 1'b1

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