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Practical guide to integrate Specman with a ISS

FormerMember
FormerMember

Hello,

I recently developed an Instruction Set Simulator using an Architecture Description Language called ArchC.

My plan is to port this ISS into Cadence's tools for further Embedded Software Verification.

It seems a good idea, however I'm facing serious problems to integrate the ISS with Specman.

I was wondering if is there a practical guide, or examples with an ISS written in SystemC?

I tried to use the IVB to create the project files, but it seems so complicated, I'm looking for a simple example

that uses an ISS in SystemC. (All the examples in the documentation either use Verilog or Host code Execution)


Thank you.

Parents
  • We do not have an examples or practical guide to integrate an ISS into Specman. However, the SystemC interface has been around for some time and is used by a large number of customers. We support access via TLM1 and TLM2 interfaces, method ports and simple ports (for variables and sc_signals). All of this is documented in the integrators guide. What specific issues are you running into?
Reply
  • We do not have an examples or practical guide to integrate an ISS into Specman. However, the SystemC interface has been around for some time and is used by a large number of customers. We support access via TLM1 and TLM2 interfaces, method ports and simple ports (for variables and sc_signals). All of this is documented in the integrators guide. What specific issues are you running into?
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