hi,due to technical problem i am running simulation through terminal. Therefore, I have a Verilog file, a test bench and i have also exported from Genus synthesized netlist and sdf file. Now, how can i annotate sdf in my post-synthesis simulation using XCELIUM while using command line?thank you
Happily enough, you don't need a GUI to do SDF annotated simulation
There is a Rapid Adoption Kit (RAK) on the support site, which shows you the 3 main flows that you can use for SDF simulation, I would strongly recommend reading that: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O3w000009bdRmEAI&pageName=ArticleContent especially since it also covers how to debug SDF issues.