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Replication Patterns

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Look what I got!

    preamble =   '{PREAMBLE_SIZE{40'hDDDDDDDDDD}};
                                |
ncvlog: *E,APTYPE (/lsi/ftc/yampa_design/users/dfechser/experimental/lib/lsi_uvc_lib/lsi_nrz/sv/lsi_nrz_package.sv,81|32): Assignment Pattern - replication patterns unsupported at this time (PREAMBLE_SIZE) [SystemVerilog].


...anyone know when ncverilog will support this (PREAMBLE_SIZE is a variable)?

Dave F.


Originally posted in cdnusers.org by dfechser
Parents

  • If it's a parameter, why not do

    ------------------------------------
    module temp;

    parameter PREAMBLE_SIZE = 16;
    bit [PREAMBLE_SIZE*40-1:0] preamble;

    initial begin
    preamble='{{PREAMBLE_SIZE{40'hDDDDDDDDDD}}};
    end

    endmodule
    ------------------------------------
    It compiled for me in 5.83. I assume the OP wanted to pass it to a task as a parameter like

    ------------------------------------
    module test;

    // the dynamic array must be defined here because it is invalid in a task
    bit preamble[];

    task xxx(input int PREAMBLE_SIZE);


    preamble = new[PREAMBLE_SIZE*40];

    preamble = '{PREAMBLE_SIZE{40'hDDDDDDDDDD}};

    endtask

    initial begin
    xxx(13);
    xxx(10);
    end

    endmodule
    ------------------------------------

    When I did this, I got the same error messages as the OP. I tried your for loop trick in the above and it worked OK.

    David Walker


    Originally posted in cdnusers.org by dwalker@sirenza.com
Reply

  • If it's a parameter, why not do

    ------------------------------------
    module temp;

    parameter PREAMBLE_SIZE = 16;
    bit [PREAMBLE_SIZE*40-1:0] preamble;

    initial begin
    preamble='{{PREAMBLE_SIZE{40'hDDDDDDDDDD}}};
    end

    endmodule
    ------------------------------------
    It compiled for me in 5.83. I assume the OP wanted to pass it to a task as a parameter like

    ------------------------------------
    module test;

    // the dynamic array must be defined here because it is invalid in a task
    bit preamble[];

    task xxx(input int PREAMBLE_SIZE);


    preamble = new[PREAMBLE_SIZE*40];

    preamble = '{PREAMBLE_SIZE{40'hDDDDDDDDDD}};

    endtask

    initial begin
    xxx(13);
    xxx(10);
    end

    endmodule
    ------------------------------------

    When I did this, I got the same error messages as the OP. I tried your for loop trick in the above and it worked OK.

    David Walker


    Originally posted in cdnusers.org by dwalker@sirenza.com
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