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Verification with system verilog

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Verification environment implementation with system verilog.


Originally posted in cdnusers.org by jagannadh.sv
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    Hi jagannadh.sv

    Could you please post the log file and your test bench writing in system verilog?
    Cadence IUS low version can’t support the some features of system verilog.These
    features could find in the document of the tool installing directory.

    shawn lieu


    Originally posted in cdnusers.org by shawn-1
Reply
  • archive

    Hi jagannadh.sv

    Could you please post the log file and your test bench writing in system verilog?
    Cadence IUS low version can’t support the some features of system verilog.These
    features could find in the document of the tool installing directory.

    shawn lieu


    Originally posted in cdnusers.org by shawn-1
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