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looking for SV testbench command file Hiisequencer code

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I'm working on exsiting test bench , and i need to modify it.
At the moment all our tests are running in serial one after the other .
 
We want to run tests in a different way. To be able to kick tests using “control file” that will be able to
Run test in serial or parallel (fork/join) , test in a loop or  have a “name” of test with input variables (like SEED for random run).
 
My question is , is there SystemVerilog (AVM) open source code we can use of a Sequencer that can read external files and kick test in similar manner ?
Or something similar that can be a good starting point ?
 
 
It may look like this :
 
Sync = 0, wait = 1
test  0  test1   0
test   1  test2   1
 
Sync and wait are controls to the sequencer to run the test in specific manner . and same for values after the test name.
 Thanks Dan
 


Originally posted in cdnusers.org by danny_isr

  • actually doesn't need to be real code. even just definition will help


    Originally posted in cdnusers.org by danny_isr

  • It's best if you put each test in a separate module (or at least separate tasks). You can then instantiate each test in the top level and use $test$plusargs system task to choose which test to trigger. Here is an excerpt from "NC-Verilog Simulator Help", Ch 14: The following example illustrates how to use $test$plusargs to control which stimulus file is used for a particular simulation. initial if ($test$plusargs("test01")) $readmemh("test01.dat", stim_mem); if ($test$plusargs("test02")) $readmemh("test02.dat", stim_mem); if ($test$plusargs("test03")) $readmemh("test03.dat", stim_mem); if ($test$plusargs("test04")) $readmemh("test04.dat", stim_mem); By using the $test$plusargs system function, you can change the stimulus without rebuilding the design. This method is also an easy way to run multiple simulations in parallel. For example: % ncsim snapshot_name +test01 & % ncsim snapshot_name +test02 & % ncsim snapshot_name +test03 & % ncsim snapshot_name +test04 & Tim


    Originally posted in cdnusers.org by tpylant

  • Hi Danny,

    similarly you can use $value$plusargs to pass the sequence.
    According to which your testcases you can execute.

    As per parallel execution is concerned you can pass command for that with testcase name to be executed in parallel through same
    $value$plusargs on command line.(both testcase thread should not overlap.).


    Originally posted in cdnusers.org by divyeshg

  • thanks so much for your replies .
    looking into it .

    Danny


    Originally posted in cdnusers.org by danny_isr

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