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Help Needed for multiple transactions

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Hello Friends,

    I'm coding a UVC(Universal Verification Component) in System Verilog Class Based methodology. For the protocol, which I've coded, I could successfully get one complete transaction. But I couldn't get second transaction or any successive transactions.

   I'm getting struck at "get_next_item"(for second trasaction)....I tried to debug but couldn't proceed further.

So, could someone help me in removing this problem so that I could get multiple transactions.

Thanks in advance,
Jalli


Originally posted in cdnusers.org by jaally
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