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RC: clock gating

Yemelya

Hello,

What is the right way to insert clock gating in RC script?


I found the following flag:
               set_attribute lp_insert_clock_gating true

Is it enough or there is something else needed?

How should I translate the following instructions from DC for RC:

 set_clock_gating_style -sequential_cell latch \
 -control_point after \
 -control_signal scan_enable \
 -minimum_bitwidth 8 \
 -observation_logic_depth 6

 compile_ultra -gate_clock


Thank you very much!!!
Boris

 

  •  Hi Boris,

     set_attribute lp_insert_clock_gating true  /  (notice the '/' for the objec; do not forget those or you can infer the wrong thing)

     is the minimal.There are a fair number of option associated with clock gating that you enable in addition to that. A typical flow usually has

    define_dft shift_enable -name <SCAN ENABLE OBJECT NAME> -active high<SCAN ENABLE PORT>

    set_attr lp_insert_clock_gating true /

    set_attr lp_clock_gating_min_flops 3 [find /designs -design <DESIGN NAME>]

    set_attr lp_clock_gating_test_signal <SCAN ENABLE OBJECT NAME> <DESIGN NAME>

     

    As per your migration question

     set_clock_gating_style -sequential_cell latch \
     -control_point after \
     -control_signal scan_enable \
     -minimum_bitwidth 8 \
     -observation_logic_depth 6

     compile_ultra -gate_clock

     would translate to 

    define_dft shift_enable -name scan_enable -active high<SCAN ENABLE PORT>

    set_attr lp_insert_clock_gating true /  (default is false)

    set_attr lp_clock_gating_min_flops 8 [find /designs -design <DESIGN NAME>]

    set_attr lp_clock_gating_style latch [find /designs -design <DESIGN NAME>]     (default is latch)

    set_attr lp_clock_gating_control_point postcontrol [find /designs -design <DESIGN NAME>]     (default is precontrol)

    set_attr lp_clock_gating_test_signal scan_enable <DESIGN NAME>  (default is to tie CG test signal de-asserted)

     There is n equivalent for  -observation_logic_depth but you can do

     set_attr lp_clock_gating_add_obs_port true <DESIGN NAME>    (default is false)

     

    hope this helps,

    Diego-

     

     

     

     

     

     

  • Diego thank you very much for so fast and detailed answer!!!

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