• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Logic Design
  3. Mismatch between RTL and synthesis result (CDFG-511)

Stats

  • Locked Locked
  • Replies 4
  • Subscribers 61
  • Views 14287
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Mismatch between RTL and synthesis result (CDFG-511)

archive
archive over 20 years ago

I experience a mismatch between behavior of RTL and the Ambit Synthesis Result; whereby Ambit displays the following WARNING:
--> WARNING: Possibly an 'X' or 'Z' value propagated to a control statement
that may cause simulation mismatches between the original and
synthesized designs (File ../RTL/com.v, Line 3957) .
What is CDFG-511?
Details:
The design is an FSM which has outputs dependent from the next_state, i.e. mealy outputs. In the synthesis result the next_state after the power on reset evaluates to 'x' although the next_state is in this case only dependent from the current state which is well defined by the reset. Ambit involves additional signals in the calculation of the next_state, which are not defined at this time. Ambit Version is v5.7-s133.


Originally posted in cdnusers.org by weidi1
  • Cancel
Parents
  • archive
    archive over 20 years ago

    Hi weidi1,
    I meant there might be some undriven signal propagated to the control statement like 'case', 'if'. Do you see any undriven net reported from 'check_netlist'?

    Seems like this is something specific to your design that triggers the warning. I don't think we can resolve it here in this forum. If you can send that piece of RTL to Cadence Support, we can investigate further.


    Originally posted in cdnusers.org by synthman
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • archive
    archive over 20 years ago

    Hi weidi1,
    I meant there might be some undriven signal propagated to the control statement like 'case', 'if'. Do you see any undriven net reported from 'check_netlist'?

    Seems like this is something specific to your design that triggers the warning. I don't think we can resolve it here in this forum. If you can send that piece of RTL to Cadence Support, we can investigate further.


    Originally posted in cdnusers.org by synthman
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information