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RTL_compiler SDF

archive
archive over 19 years ago

Hi,

I need to simulate a gate-level netlist from RC 4.2.2
Can anybody knows how to generate an
sdf file from RC?

I've used the "write_sdf" command but the program says
that it's obsolete and doesn't accept any option.
Moreover the RC documentation doesn't tell
anything about "write_sdf"

Thank you.


Originally posted in cdnusers.org by giohdl
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  • archive
    archive over 19 years ago

    Hi EngHan,

    I think you're right in general.
    My circuit contains several interconnected FSMs so
    I've preferred to simulate before P&R
    avoiding zero delays in cells.

    Regards,
    Giohdl


    Originally posted in cdnusers.org by giohdl
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  • archive
    archive over 19 years ago

    Hi EngHan,

    I think you're right in general.
    My circuit contains several interconnected FSMs so
    I've preferred to simulate before P&R
    avoiding zero delays in cells.

    Regards,
    Giohdl


    Originally posted in cdnusers.org by giohdl
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