• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Logic Design
  3. abort points

Stats

  • Locked Locked
  • Replies 3
  • Subscribers 61
  • Views 15560
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

abort points

archive
archive over 19 years ago

i'm running an rtl2gate verification and i'm running into abort point issues.  the gate level netlist has scan and clock gating inserted.  i'm running version 05.10-s200

i have the "set flatten model -gated_clock" switch set. 

i've tried running a "compare effort high" run after the medium run.
i've tried "set compare option -part flow" (undocumented) with "compare effort low"

i've run out of ideas, and i can't find any documentation anywhere on how to deal with abort points.  the cone of logic doesn't seem to complicated: there are 3 DFFs and 1 PI feeding this cone. 

i was able to verify the same design using synopsys formality. 


Originally posted in cdnusers.org by crackoner
  • Cancel
Parents
  • archive
    archive over 19 years ago

    Hi

    Correct. No need for 'analyze abort -verbose' if 'analyze abort -compare' did the trick.

    We're getting very good success with that command in 6.1.

    Chrystian


    Originally posted in cdnusers.org by croy
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • archive
    archive over 19 years ago

    Hi

    Correct. No need for 'analyze abort -verbose' if 'analyze abort -compare' did the trick.

    We're getting very good success with that command in 6.1.

    Chrystian


    Originally posted in cdnusers.org by croy
    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information