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Warning during RTL Synthesis

Arslan

Hi, When I compile my RTL, among I get the following warning 

Warning : Possible timing problems have been detected in this design. [TIM-11]
        : The design is 'counter'.

Can anyone tell me what does that mean?

Parents

  •  This is a very common warning, and it essentially means you may have some timing constraint issues in your design.  In order to see these constraint issues, run "report timing -lint".

     FYI, for any message code in RC, you can run "man" to see more information about the message.

    rc:/> man TIM-11
    Entry       : TIM-11
    Severity    : Warning
    Verbosity   : Message is visible at any 'information_level' above '1'.
    Description : Possible timing problems have been detected in this design.
    Help        : Use 'report timing -lint' for more information.

     

     

     

Reply

  •  This is a very common warning, and it essentially means you may have some timing constraint issues in your design.  In order to see these constraint issues, run "report timing -lint".

     FYI, for any message code in RC, you can run "man" to see more information about the message.

    rc:/> man TIM-11
    Entry       : TIM-11
    Severity    : Warning
    Verbosity   : Message is visible at any 'information_level' above '1'.
    Description : Possible timing problems have been detected in this design.
    Help        : Use 'report timing -lint' for more information.

     

     

     

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