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Help on CONFORMAL LEC flow using Synopsys's Design Compiler netlist

Rafeeq2129

I'm trying to setup flow for using CONFORMAL LEC with DC netlist, and facing few problems in mapping.

--> Conformal doesn't map the RTL(async neg reset) with its counterpart  in netlist(DC). 

---> Conformal Doesn't map the "SNPS_CLOCK_GATE_HIGH" latch 

 **************my dofile is as follows (till it goes into lec mode)

     reset

    set log file <  >

     "sourcing project specific variables"

    set undefined cell black_box

      add notranslate filepathnames <  >

      add search path

      read library -verilog2k  

       read design -noelaborate -verilog2k -nosensitive  -golden <>

         read design -noelab -systemverilog -nosensitive -golden <>

      elaborate design -golden <>

      read design  -verilog 2k -revised <>

        set flatten model -nomap -latch_transparent -latch_merge_port -seq_constant -gated_clock -seq_redundant -nodff_to_dlat_zero -verbose

 set system mode lec

 

*******************************************************************

 

please provide me the basic flow for CONFORMAL--DC netlist

 

regards,

rafeeq

 

Parents

  • Glad to read.

    You can use either hier or flat for compares. Hier is better for RTL to gates since it makes for small logic cone sizes and thus helps avoid aborts. Flat is suggested for gate to gate compares (if you encounter modeling or aborts gate to gate then you can try hier).

    The resource file is useful for resolving aborts (and avoiding them in a CAD flow). For a one-off run with no aborts it is not needed.

     

    -ts

Reply

  • Glad to read.

    You can use either hier or flat for compares. Hier is better for RTL to gates since it makes for small logic cone sizes and thus helps avoid aborts. Flat is suggested for gate to gate compares (if you encounter modeling or aborts gate to gate then you can try hier).

    The resource file is useful for resolving aborts (and avoiding them in a CAD flow). For a one-off run with no aborts it is not needed.

     

    -ts

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