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mixed-signal AMS simulation error

apple419

Hi,

   I was trying to do a simple mixed-signal simulation with AMS in Cadence ADE environment (6.15).

   In the setup there are two inverters. One inverter A has schematic view and the other inverter B has Verilog view. The Config view is created.

   In the hierarchy editor form, correct views are set (A has schematic view and B has verilog view).

In ADE, the ams is selected as the simulator. The ConnRules_3V_full_fast is selected as the connect rule. The OSS-based netlister with irun is slected.

   When I started a transient simulation, the simulation log shows the following error and the simulation stopped.

   irun: *E,BDOPT: Unknown option -rnm_partinfo

   Anyone have any idea what this error is about?  Is there anything I missed in the setup?

 

Thank you for the help!

Regards 

Parents

  • yes, it looks not normal.

    When I do simulation->netlist->recreate, the CIW window shows AMS netlisting has completed successfully.

    As you mentioned, after entered 

    _amsOSSIrunObj->feature_ncelab_rnmpartinfo 

    it retured t 

    By the way how to switch to incisiv 12.2? How do i tell if incisiv 12.2 is installed?

    When I start the virtuoso I use: virt +incisiv xh035, where xh035 is the process I use. 

     Following is the netlist it created:

    ////////////////////////////////////////////////////////////////////////

    // PLEASE DO NOT EDIT OR COMPILE THIS FILE.                             

    // IT IS MEANT FOR VIEWING PURPOSE ONLY.                                

    // 

    // All files for configuration: (re353 test02 config)

    ////////////////////////////////////////////////////////////////////////

     

    // AMS netlist generated by the OSS based AMS netlister

    // IC subversion:  IC6.1.5-64b.500.17 

    // IUS version: 12.10-s006

    // Copyright(C) 2005-2009, Cadence Design Systems, Inc

    // User: wangx Pid: 18069

    // Design library name: re353

    // Design cell name: test02

    // Design view name: config

    // Solver: Spectre

     

    `include "disciplines.vams"

    `include "userDisciplines.vams"

    // Library - xh035_std_v01, Cell - ginva, View - schematic

    // LAST TIME SAVED: Oct  1 08:44:01 2013

    // NETLIST TIME: Oct  8 13:05:29 2013

    `timescale 1ns / 1ps 

     

    (* cds_ams_schematic *) 

    module ginva (O, I);

     

    parameter Wp=7e-07;

    parameter Lp=3.5e-07;

    parameter Wn=7e-07;

    parameter Ln=3.5e-07;

     

    output  O;

     

    input  I;

     

    wire (*

    integer inh_conn_prop_name = "ggnd";

    integer inh_conn_def_value = "cds_globals.\\vss! ";*)

    cdsNet0;

     

    wire (*

    integer inh_conn_prop_name = "gpwr";

    integer inh_conn_def_value = "cds_globals.\\vdd! ";*)

    cdsNet1;

     

     

    \pmos #(.m("(1)*(1)"), .w(Wp), .l(Lp), .ad(0.85u*(Wp)), .as(0.85u*(Wp))

        , .pd(0.85u*2+(Wp)), .ps(0.85u*2+(Wp)), .nrd(0.3u/(Wp)), 

        .nrs(0.3u/(Wp)), .par1("(1)")) 

    (* integer passed_mfactor = "m"; *)

    M0 (O, I, cdsNet1, cdsNet1);

     

    \nmos #(.m("(1)*(1)"), .w(Wn), .l(Ln), .ad(0.85u*(Wn)), .as(0.85u*(Wn))

        , .pd(0.85u*2+(Wn)), .ps(0.85u*2+(Wn)), .nrd(0.3u/(Wn)), 

        .nrs(0.3u/(Wn)), .par1("(1)")) 

    (* integer passed_mfactor = "m"; *)

    M1 (O, I, cdsNet0, cdsNet0);

     

    endmodule

    // Library - re353, Cell - test02, View - schematic

    // LAST TIME SAVED: Oct  8 12:40:35 2013

    // NETLIST TIME: Oct  8 13:05:29 2013

    `timescale 1ns / 1ps 

     

    (* cds_ams_schematic *) 

    module test02 ();

     

     

    ginva #( .Wn(7e-07), .Lp(3.5e-07), .Ln(3.5e-07), .Wp(7e-07) ) I0 ( 

        .O(ginva_o), .I(net1));

     

    myinv I6 ( .o(dinv_o), .in(ginva_o));

     

    vsource #(.type("pulse"), .val0(0), .val1(3), .period(1u), .delay(0), 

        .rise(100n), .fall(100n), .width(500.0n)) V0 (net1, 

        cds_globals.\gnd! );

     

    vsource #(.dc(3), .type("dc")) V2 (cds_globals.\vdd! , 

        cds_globals.\gnd! );

     

    vsource #(.dc(0), .type("dc")) V1 (cds_globals.\vss! , 

        cds_globals.\gnd! );

     

    endmodule

    // Verilog-AMS cds_globals module for top-level cell:

    //    re353/test02.

    // Generated by ADE.

    // Cadence Design Systems, Inc.

     

    // This is an autoGenerated file, any changes done to this file may get lost.

     

    `include "disciplines.vams"

    `include "userDisciplines.vams"

     

    module cds_globals;

     

    // Global Signals

       wire \vdd! ;

       wire \vss! ;

       electrical \gnd! ;

       ground \gnd! ;

     

    // Design Variables

     

    endmodule

     

    // This is the Cadence AMS Designer(R) analog simulation control file. 

    // It specifies the options and analyses for the Spectre analog solver. 

     

    simulator lang=spectre 

     

    simulatorOptions options temp=25.0 tnom=27 scale=1.0 scalem=1.0 \

    reltol=1e-3 vabstol=1e-6 iabstol=1e-12 gmin=1e-12 rforce=1 maxnotes=5 \

    maxwarns=5 digits=5 pivrel=1e-3 checklimitdest=psf 

     

    tran tran stop=5u save=none write="spectre.ic" writefinal="spectre.fc" \

    annotate=status maxiters=5 

     

    finalTimeOP info what=oppoint where=rawfile

     

    modelParameter info what=models where=rawfile 

    element info what=inst where=rawfile 

    outputParameter info what=output where=rawfile 

     

    # This is the NC-SIM(R) probe command file

    # used in the AMS-ADE integration.

     

     

    #

    # Database settings

    #

    if { [info exists ::env(AMS_RESULTS_DIR) ] } { set AMS_RESULTS_DIR $env(AMS_RESULTS_DIR)} else {set AMS_RESULTS_DIR "../psf"}

    database -open ams_database -into ${AMS_RESULTS_DIR} -default

     

    #

    # Probe settings

    #

    probe -create -emptyok -database ams_database {test02.ginva_o}

    probe -create -emptyok -database ams_database {test02.dinv_o}

     

     

Reply

  • yes, it looks not normal.

    When I do simulation->netlist->recreate, the CIW window shows AMS netlisting has completed successfully.

    As you mentioned, after entered 

    _amsOSSIrunObj->feature_ncelab_rnmpartinfo 

    it retured t 

    By the way how to switch to incisiv 12.2? How do i tell if incisiv 12.2 is installed?

    When I start the virtuoso I use: virt +incisiv xh035, where xh035 is the process I use. 

     Following is the netlist it created:

    ////////////////////////////////////////////////////////////////////////

    // PLEASE DO NOT EDIT OR COMPILE THIS FILE.                             

    // IT IS MEANT FOR VIEWING PURPOSE ONLY.                                

    // 

    // All files for configuration: (re353 test02 config)

    ////////////////////////////////////////////////////////////////////////

     

    // AMS netlist generated by the OSS based AMS netlister

    // IC subversion:  IC6.1.5-64b.500.17 

    // IUS version: 12.10-s006

    // Copyright(C) 2005-2009, Cadence Design Systems, Inc

    // User: wangx Pid: 18069

    // Design library name: re353

    // Design cell name: test02

    // Design view name: config

    // Solver: Spectre

     

    `include "disciplines.vams"

    `include "userDisciplines.vams"

    // Library - xh035_std_v01, Cell - ginva, View - schematic

    // LAST TIME SAVED: Oct  1 08:44:01 2013

    // NETLIST TIME: Oct  8 13:05:29 2013

    `timescale 1ns / 1ps 

     

    (* cds_ams_schematic *) 

    module ginva (O, I);

     

    parameter Wp=7e-07;

    parameter Lp=3.5e-07;

    parameter Wn=7e-07;

    parameter Ln=3.5e-07;

     

    output  O;

     

    input  I;

     

    wire (*

    integer inh_conn_prop_name = "ggnd";

    integer inh_conn_def_value = "cds_globals.\\vss! ";*)

    cdsNet0;

     

    wire (*

    integer inh_conn_prop_name = "gpwr";

    integer inh_conn_def_value = "cds_globals.\\vdd! ";*)

    cdsNet1;

     

     

    \pmos #(.m("(1)*(1)"), .w(Wp), .l(Lp), .ad(0.85u*(Wp)), .as(0.85u*(Wp))

        , .pd(0.85u*2+(Wp)), .ps(0.85u*2+(Wp)), .nrd(0.3u/(Wp)), 

        .nrs(0.3u/(Wp)), .par1("(1)")) 

    (* integer passed_mfactor = "m"; *)

    M0 (O, I, cdsNet1, cdsNet1);

     

    \nmos #(.m("(1)*(1)"), .w(Wn), .l(Ln), .ad(0.85u*(Wn)), .as(0.85u*(Wn))

        , .pd(0.85u*2+(Wn)), .ps(0.85u*2+(Wn)), .nrd(0.3u/(Wn)), 

        .nrs(0.3u/(Wn)), .par1("(1)")) 

    (* integer passed_mfactor = "m"; *)

    M1 (O, I, cdsNet0, cdsNet0);

     

    endmodule

    // Library - re353, Cell - test02, View - schematic

    // LAST TIME SAVED: Oct  8 12:40:35 2013

    // NETLIST TIME: Oct  8 13:05:29 2013

    `timescale 1ns / 1ps 

     

    (* cds_ams_schematic *) 

    module test02 ();

     

     

    ginva #( .Wn(7e-07), .Lp(3.5e-07), .Ln(3.5e-07), .Wp(7e-07) ) I0 ( 

        .O(ginva_o), .I(net1));

     

    myinv I6 ( .o(dinv_o), .in(ginva_o));

     

    vsource #(.type("pulse"), .val0(0), .val1(3), .period(1u), .delay(0), 

        .rise(100n), .fall(100n), .width(500.0n)) V0 (net1, 

        cds_globals.\gnd! );

     

    vsource #(.dc(3), .type("dc")) V2 (cds_globals.\vdd! , 

        cds_globals.\gnd! );

     

    vsource #(.dc(0), .type("dc")) V1 (cds_globals.\vss! , 

        cds_globals.\gnd! );

     

    endmodule

    // Verilog-AMS cds_globals module for top-level cell:

    //    re353/test02.

    // Generated by ADE.

    // Cadence Design Systems, Inc.

     

    // This is an autoGenerated file, any changes done to this file may get lost.

     

    `include "disciplines.vams"

    `include "userDisciplines.vams"

     

    module cds_globals;

     

    // Global Signals

       wire \vdd! ;

       wire \vss! ;

       electrical \gnd! ;

       ground \gnd! ;

     

    // Design Variables

     

    endmodule

     

    // This is the Cadence AMS Designer(R) analog simulation control file. 

    // It specifies the options and analyses for the Spectre analog solver. 

     

    simulator lang=spectre 

     

    simulatorOptions options temp=25.0 tnom=27 scale=1.0 scalem=1.0 \

    reltol=1e-3 vabstol=1e-6 iabstol=1e-12 gmin=1e-12 rforce=1 maxnotes=5 \

    maxwarns=5 digits=5 pivrel=1e-3 checklimitdest=psf 

     

    tran tran stop=5u save=none write="spectre.ic" writefinal="spectre.fc" \

    annotate=status maxiters=5 

     

    finalTimeOP info what=oppoint where=rawfile

     

    modelParameter info what=models where=rawfile 

    element info what=inst where=rawfile 

    outputParameter info what=output where=rawfile 

     

    # This is the NC-SIM(R) probe command file

    # used in the AMS-ADE integration.

     

     

    #

    # Database settings

    #

    if { [info exists ::env(AMS_RESULTS_DIR) ] } { set AMS_RESULTS_DIR $env(AMS_RESULTS_DIR)} else {set AMS_RESULTS_DIR "../psf"}

    database -open ams_database -into ${AMS_RESULTS_DIR} -default

     

    #

    # Probe settings

    #

    probe -create -emptyok -database ams_database {test02.ginva_o}

    probe -create -emptyok -database ams_database {test02.dinv_o}

     

     

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