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[Help] How to convert the verilog code to circuit for ADC simulation.

xxgenerall

Hi,

I'm working on ADC recently, which is really mixed signal system. The analog circuit has been established, including comparator, amp, etc. The logic part has been realized in verilog code. Now, I want to do a simulation for the whole ADC system. But I don't know how to convert the verilog code into some circuit, so that the logic part can be combined with the analog part.

Should the verilog code be realized by Verilog-A ? Or, Should I use the verlog-ams?

Sorry, I'm realy confused. Could you give me some advice, please? 

 Thanks a lot.

Parents

  • You don't need to change the code at all - just use "ams" as the simulator - and this will run AMS Designer and do a mixed signal simulation with your analog parts simulated using the spectre/APS analog solver, and the digital parts with the ncsim "solver" (it's not really a solver). This is a single-executable simulator which handles mixed-signal.

    There's a tutorial in the documentation under AMS Designer.

    Regards,

    Andrew.

Reply

  • You don't need to change the code at all - just use "ams" as the simulator - and this will run AMS Designer and do a mixed signal simulation with your analog parts simulated using the spectre/APS analog solver, and the digital parts with the ncsim "solver" (it's not really a solver). This is a single-executable simulator which handles mixed-signal.

    There's a tutorial in the documentation under AMS Designer.

    Regards,

    Andrew.

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