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About the driving ability of digital circuits in spectreVerilog simulation.

xxgenerall over 11 years ago

Hi,

The circuit is like below. And notG is just a very simple verilog "not gate", which code is like this.

module (Vin,Vout);

input Vin;

output Vout;

assign Vout=~Vin;

endmodule;

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xxgenerall over 11 years ago

With different loads, vout is also different. Like below,
- Tran.jpg
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xxgenerall over 11 years ago

With different loads, vout is also different. Like below,
- Tran.jpg
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