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Resistance calculation of switch capacitor circuit

mkza1002

i am using cadence 6.1.5

I want to calculate resistance of a switch capacitor circuit using ladder topology.

i did dc analysis and plot Vs / Is  but difficult to calculate resistance from plot.

can anyone help me  with this

Thank you.

Parents

  • I had been hoping to do some experiments, but lack of time to put together an example means that instead I'll just make a suggestion instead.

    What I think you probably should do is run a PSS analysis over your clock period (so the fundamental would be the frequency of the clock). Then set the PAC magnitude on the voltage source on the left.  You could set this to 1 - because it's a small signal analysis. Then save the current through this source and you can then plot 1/current from the PAC results to give the time-averaged impedance. I think that may be OK - probably worth checking with a single switch-capacitor stage and see if it's close to what you'd expect from theory.

    Regards,

    Andrew.

Reply

  • I had been hoping to do some experiments, but lack of time to put together an example means that instead I'll just make a suggestion instead.

    What I think you probably should do is run a PSS analysis over your clock period (so the fundamental would be the frequency of the clock). Then set the PAC magnitude on the voltage source on the left.  You could set this to 1 - because it's a small signal analysis. Then save the current through this source and you can then plot 1/current from the PAC results to give the time-averaged impedance. I think that may be OK - probably worth checking with a single switch-capacitor stage and see if it's close to what you'd expect from theory.

    Regards,

    Andrew.

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