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how to convert text string to integer in VerilogA?

DavidLou

hello experts,

in VerilogA, "reg" is not supported in Cadence yet even it's described in the Cadence version of VerilogA manual, and I'm having a hard time to pass some text string into integer value (ideally into bit values). I can not access individual bit of a string type. seems wire [] array is type of node and therefore I can't use it in assignment. anyway, I'm seeking for someway to convert string like "Hello World" into integer (ascii) values. 

thanks a lot,

David

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  • Hi David,

    Which manual are you looking at? I just looked at the Cadence® Verilog®-A Language Reference manual from SPECTRE17.1 and there is no mentioned of "reg" there. I'd be surprised because it's a digital construct and so makes no sense in the analog Verilog-A language. If it was the Cadence® Verilog®-AMS Language Reference manual from an INCISIVE or XCELIUM stream (may be in the IC stream too - I forget) then that would make more sense, but then it would be talking about Verilog AMS and you'd have to use a Verilog AMS view and simulate it in AMS Designer.

    Regards,

    Andrew.

  • in reply to Andrew Beckett

    Hi Andrew,

    very funny. we are looking up from Verilog-AMS for Verilog-A! 

    by all means, how can I convert text string (like "Hello World") into ASCII value (so that I can wiggle a vector variable for plotting purpose)? 

    thanks,

    David

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