• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Mixed-Signal Design
  3. DC offset

Stats

  • Locked Locked
  • Replies 1
  • Subscribers 65
  • Views 18885
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

DC offset

Charanraj Mohan
Charanraj Mohan over 7 years ago

Hello all,

  I am doing a simulation to determine the DC offset of a two-stage PMOS-based differential opamp. Say, for instance I am using some technique to calibrate the DC offset of the opamp or even assume that I simply observe the DC transfer characteristics curve & determine the DC offset by keeping the reference voltage to VDD/2. I want to know the contribution of that DC offset in terms of % of every MOSFET. DC offset voltage mainly arises due to the device mismatch, differential or current mirror pair's un-matching & other factors. Say, the DC offset of the opamp is 50 mV & I want to determine each MOSFET's contribution or at least a MOSFET-pair's contribution to it. Is it possible in Viruoso Visualization & Analysis tool of CADENCE ?  

 Thanks in advance :)

  • Cancel
Parents
  • Frank Wiedmann
    Frank Wiedmann over 7 years ago

    I suggest that you take a look at https://community.cadence.com/cadence_blogs_8/b/cic/posts/the-art-of-analog-design-part-4-mismatch-analysis and https://community.cadence.com/cadence_blogs_8/b/cic/posts/the-art-of-analog-design-part-5-response-to-frank-s-question for a start.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • Frank Wiedmann
    Frank Wiedmann over 7 years ago

    I suggest that you take a look at https://community.cadence.com/cadence_blogs_8/b/cic/posts/the-art-of-analog-design-part-4-mismatch-analysis and https://community.cadence.com/cadence_blogs_8/b/cic/posts/the-art-of-analog-design-part-5-response-to-frank-s-question for a start.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information