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  3. Using $strobe in Verilog-A module

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Using $strobe in Verilog-A module

Brad RFeng
Brad RFeng over 2 years ago

Hi,

I would like to observe voltages and currents in the Cadence supplied va module rfLib/lna during an sp analysis. The following lines were added in the analog block after the end of the initial_step block.
$strobe("V(in)=%e V(out)=%e I(in_int)=%e I(out_int)",V(in),V(out),I(in_int),I(out_int));
$strobe("a1=%e a2=%e",a1,a2);
The strings are displayed in the spectre.out window but all values are 0.0e+0. I was expecting to see the values change as the simulation iterations progressed. The module is simulating as expected and results returned to ADE output are correct. I'm relatively new to Verilog-A so perhaps I'm missing something basic? 

Regards,
Brad

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  • ShawnLogan
    ShawnLogan over 2 years ago

    Dear Brad RFeng,

    Brad RFeng said:
    The strings are displayed in the spectre.out window but all values are 0.0e+0. I was expecting to see the values change as the simulation iterations progressed.

    Did you include a conditional statement such as a cross event or a timer event to instantiate your $strobe() function on some periodic basis?

    I think if you included a single $strobe() function, it will only print its arguments once - which in your case is after the initial_step block. Hence, is it possible the values of 0 you observe that are printed are the initial values of your arguments?

    Shawn

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  • Brad RFeng
    Brad RFeng over 2 years ago in reply to ShawnLogan

    I thought about the possibility that I'm only seeing the results for the initial condition and so tried to use event @(final_step) but that gave the same results. In the context of an sp analysis I'm not sure what event makes sense given an sp analysis is not time dependent. Events seem to all be time related. 

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  • Brad RFeng
    Brad RFeng over 2 years ago in reply to Brad RFeng

    Well it seems @(above(V(out))) condition is met but the following $strobe still gives 0 for all variables. 

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to Brad RFeng

    Brad,

    Because you are running a small-signal analysis (sp), the circuit equations are linearised and it does not step through the code in the Verilog-A model (after the initial DC). It is expected that you wouldn't see strobe messages and so on in that case because there's no need for the code to be re-evaluated (unless, I think, the sp analysis was sweeping something which caused the operating point to change).

    You would see the strobes being output in a transient or a dc sweep, for example.

    Regards,

    Andrew

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  • Brad RFeng
    Brad RFeng over 2 years ago in reply to Andrew Beckett

    Hi Andrew,

    Using $freq and a conditional [if (analysis("sp"))] I'm able to see the initial DC step where $freq=0 and then another evaluation when $freq=10G, but $strobe returns 0.0 for voltages and currents for initial DC and when freq=10G. Variables from other intermediate calculations do display correctly. Here's a snippet from spectre.out that shows $strobe output mixed with other spectre output:

    ****************************************
    S-Parameter Analysis `sp': freq = 10 GHz
    ****************************************

    analog begin: freq= 0.000000 GHz
    analysis type: sp.
    initial_step begin.
    Here: analysis sp.

    V(in)=0.000000e+00 V(out)=0.000000e+00 I(in_int)=0.000000e+00 I(out_int)=0.000000e+00
    a1=0.000000e+00 a2=0.000000e+00
    s11=3.162278e-08 s12=1.000000e-10 s21=-5.623413e+00 s22=3.162278e-08


    DC simulation time: CPU = 399 us, elapsed = 401.02 us.

    analog begin: freq= 10.000000 GHz
    analysis type: sp.
    V(in)=0.000000e+00 V(out)=0.000000e+00 I(in_int)=0.000000e+00 I(out_int)=0.000000e+00
    a1=0.000000e+00 a2=0.000000e+00
    s11=3.162278e-08 s12=1.000000e-10 s21=-5.623413e+00 s22=3.162278e-08


    Accumulated DC solution time = 0 s.
    Intrinsic sp analysis time = 0 s.
    Total time required for sp analysis `sp': CPU = 1.535 ms, elapsed = 4.10104 ms.
    Time accumulated: CPU = 378.619 ms, elapsed = 2.53054 s.
    Peak resident memory used = 97.6 Mbytes.

    ---------------------------------------------------------------------------------------------------------------------------

    For the initial DC evaluation it makes sense that the voltages and currents are 0.0 given no external source. But this raises the question how does Spectre linearize the circuit without passing in some finite voltages to determine gradients and why don't we see that? Also during the eval at freq=10G we see again the voltages and currents are 0.0 so how does Spectre gain any knowledge of the circuit response? 

    Brad

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Brad RFeng

    Dear Brad RFeng,

    Brad RFeng said:

    For the initial DC evaluation it makes sense that the voltages and currents are 0.0 given no external source. But this raises the question how does Spectre linearize the circuit without passing in some finite voltages to determine gradients and why don't we see that? Also during the eval at freq=10G we see again the voltages and currents are 0.0 so how does Spectre gain any knowledge of the circuit response? 

    As Andrew noted, verilog-A code is not evaluated during a small-signal analysis, such as an S-parameter analysis. As a result, the $strobe expression arguments will not reflect any change in value with frequency and will only show the values from the DC operating analysis.

    You might be interested in a 2006 discussion on the Designer's Guide Forum on the topic of accessing AC analysis results within a veriilog-A block between Ken Kundert and a couple of forum members.

    To avoid the spam filter, copy and paste the following into your favorite browser after typing in the designers guide prefix...

    forum/YaBB.pl?action=print;num=1156512831

    A couple of points are worth considering in terms of your objective.

    1. To quote Ken in one of his responses, "Verilog-A models are not actually evaluated during the AC analysis. Rather, a DC analysis is run and the model is linearized about the DC operating point. It is linearization that is used during the AC analysis. "

    2. Verilog-A does not natively handle complex numbers. In an S-parameter analysis (or any small-signal analysis), the node voltages and branch currents are in general complex entities. Hence, it is not clear how a $strobe expression in a verilog-A block could even print out the correct values. One can write verilog-A functions to handle complex arithmetic if both the real and imaginary parts are expressed as real variables. However, I do not know how one would access a complex node voltage or current.

    https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1Od0000000nSr5EAE&pageName=ArticleContent

    Shawn

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  • Brad RFeng
    Brad RFeng over 2 years ago in reply to ShawnLogan

    Shawn,

    Thanks for the link, it is rather old but there are some nuggets in that discussion. It will take a little while to go through it carefully. It starts with the question of how to measure frequency and it seems all contributors agreed it can't be done. It is likely that Cadence's implementation of Verilog-A has evolved since then because I have used function $freq to access the frequency during an sp analysis. I don't remember where I learned about $freq and I can't find it in the documentation.

    Do you know of any documentation that discusses function $freq?

    Is there a CIW command or other way to determine which version of Verilog-A I'm using?

    Brad

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to Brad RFeng

    Brad,

    $freq support was originally added for bsource and then later allowed in Spectre (from an MMSIM15.1 ISR). There used to be an article which covered this, but it was marked obsolete because it was old - however, as you say, it's not in the documentation.

    It is only supported for small-signal analyses with Verilog-A - as the challenge is that Verilog-A models are generally written to work in the time-domain and then the simulator takes care of coming up with something that simulates in the frequency domain (the opposite direction is much harder); the support for $freq allows for some frequency-dependent modelling approaches (for small-signal only). I found an old request to document it, but this was linked to a request to document it for bsource; it seems that it was documented for bsource but Verilog-A was overlooked. I suggest you contact customer support to request that it's documented for Verilog-A (maybe there's a good reason why we've not done so, but it looks like an oversight to me).

    As for the version - it's just the spectre version. Whatever "spectre -W" outputs from the terminal.

    Regards,

    Andrew

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  • Brad RFeng
    Brad RFeng over 2 years ago in reply to Andrew Beckett

    Andrew,

    I'll make a request to customer support about $freq documentation.

    I'd like to pull the above thread a bit more on the linearization process. Do you have thoughts on how Spectre uses the va module to determine the linearized circuit equivalent? It seems it would need to hit it with 0V and an additional small voltage to determine the I-V gradient at each node.

    Thanks again!

    Brad

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Brad RFeng

    Dear Brad,

    Brad RFeng said:
    Do you have thoughts on how Spectre uses the va module to determine the linearized circuit equivalent? It seems it would need to hit it with 0V and an additional small voltage to determine the I-V gradient at each node.

    I will definitely not even pretend to answer for Andrew, but may be able to provide a little insight that might help answer your question.

    The rfLib LNA is a behavioral model and contains a model that is characterized by a set of parameters such as rin, cin, gain, isolation, etc... Each is specified by setting the parameter values. As such, its model is determined by the parameters you supply and the small-signal behavior can be determined from those parameters and its charactersitics of its input and output pin connections, The need for "an additional small voltage" as you mentioned is satisfied by taking the derivative of the model about the DC operating point. As an example, for a three terminal transistor (MOS or BJT), the value of small-signal gm is found from the derivative of the output current with respect to the gate-source or base-emiitter voltage. Looking at the model parameters for the LNA, it appears the gain is already a parameter and the input and output impedances are circuit components. Hence, I'm not what sure what other operating point dependent small-signal entities need to be determined for a small-signal analysis. Since it is a linear analysis, the parameter ip3 is ignored.

    I'm not sure if this information helps or not, but thought I would pass it by you in case it might.

    Shawn

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