Stats

  • Locked Locked
  • Replies 4
  • Subscribers 64
  • Views 5092
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Missing pins in symbol creation of systemVerilog module

MostafaAbedi

Hi everyone,

I am doing AMS simulation and want to create a symbol of a  systemVerilog module. in this systemVerilog module (main.sv) a package is also imported (package.sv) which is already compiled. The issue is that when I want to create a symbol for ‘main.sv’, some pins are not generated as you see in the screenshot, and are noted as ‘NulPort’:

This is a snippet of ‘main.sv’ where these 4 ports are defined:

And these is the snippet of ‘package.sv’ where the type of these ports is defined:

Any idea about how to solve the issue?( to have the 4bit pins  'i_mosi_state_0' and 'i_mosi_state_1' , and the 5bit pins  'i_moji_state_0' and 'i_moji_state_1')

Thanks!

Mostafa

Parents
  • MostafaAbedi

    Hi everyone,

    I am doing AMS simulation and want to create a symbol of a  systemVerilog module. in this systemVerilog module (main.sv) a package is also imported (package.sv) which is already compiled. The issue is that when I want to create a symbol for ‘main.sv’, some pins are not generated as you see in the screenshot, and are noted as ‘NulPort’:

    This is a snippet of ‘main.sv’ where these 4 ports are defined:

    And these is the snippet of ‘package.sv’ where the type of these ports is defined:

    Any idea about how to solve the issue?( to have the 4bit pins  'i_mosi_state_0' and 'i_mosi_state_1' , and the 5bit pins  'i_moji_state_0' and 'i_moji_state_1')

    Thanks!

    Mostafa

  • Andrew Beckett
    in reply to MostafaAbedi

    Mostafa,

    I see the same issue. I found some reported problems with other scenarios which give the same outcome, but these have been fixed. I'm assuming that it's related to the typedef being multi-bit, but I'm not sure. Anyway, I filed a change request #3045801 for this; you probably should contact customer support (submit a case after logging in) and reference this post and request that a duplicate is filed on your behalf.

    Regards,

    Andrew

Reply
  • Andrew Beckett
    in reply to MostafaAbedi

    Mostafa,

    I see the same issue. I found some reported problems with other scenarios which give the same outcome, but these have been fixed. I'm assuming that it's related to the typedef being multi-bit, but I'm not sure. Anyway, I filed a change request #3045801 for this; you probably should contact customer support (submit a case after logging in) and reference this post and request that a duplicate is filed on your behalf.

    Regards,

    Andrew

Children
  • Andrew Beckett
    in reply to Andrew Beckett

    I found a workaround - this problem only occurs (by default) in IC23.1 (which explains why it may not have been reported before - the issue has only appeared relatively recently). If you set:

    vmsEnableRapidImport = nil

    in the CIW before the symbol is generated, then the pins will be correctly created.

    Regards,

    Andrew

  • MostafaAbedi
    in reply to Andrew Beckett

    Hi Andrew,

    Thank you so much. Yes, it is IC23.1, and by setting 'vmsEnableRapidImport = nil' in CIW it created the pins that were missing. It is still not multi-bit though, and I will probably have error if I connect a multi-bit net to a single pin in schematic. Seems I will need to modify the code, or create a wrap code or something.

    Thank you again.

    Mostafa

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.