PCB Design - PCB Design & IC Packaging (Allegro X)

PCB Design

Latest Posts

Discussion

ORCIS-6085 error.

Category: PCB Design

By youndersun
•
started over 5 years ago

0 replies • 12003 views
Discussion

Could this function "Online DRC" be set as default disable in Capture?

Category: PCB Design

By RaymondG
•
started over 5 years ago

0 replies • 1720 views
Discussion

Internal unused via pad suppression not working

Category: PCB Design

By atoddrich
•
updated over 5 years ago by atoddrich

2 replies • 13814 views
Discussion

Propagation Delay Delta tolerance value in mils

Category: PCB Design

By GK MN
•
updated over 5 years ago by GK MN

2 replies • 13849 views
Discussion

pcb footprint creation

Category: PCB Design

By Dinesh Moka
•
started over 5 years ago

0 replies • 11546 views
Discussion

Scalpel skill file

Category: PCB Design

By atoddrich
•
updated over 5 years ago by redwire

3 replies • 12453 views
Discussion

Show preview of footprint and schematic symbol in external database management app

Category: PCB Design

By MrMarcus
•
updated over 5 years ago by RFinley

1 replies • 11822 views
Discussion

OrCAD tcl script for Export Hierarchy?

Category: PCB Design

By ron2015schmitt
•
updated over 5 years ago by jpolakow

2 replies • 13475 views
Discussion

PCB Editor Tool for Matched Lengths in DDR Fly-By Topology?

Category: PCB Design

By Gipper
•
updated over 5 years ago by Gipper

8 replies • 17506 views
Discussion

When the net schedule is set in the PCB editor and auto-routing is executed, the routing is different from the set schedule.

Category: PCB Design

By wjavos
•
updated over 5 years ago by steve

3 replies • 12251 views
Discussion

WARNING(ORNET-1119): The part/device cannot be simulated. No PSpiceTemplate found on J1, ignoring this part/device from simulation netlist

Category: PCB Design

By desertbird
•
updated over 5 years ago by desertbird

1 replies • 7600 views
Discussion

How to solve the via shorting issue?

Category: PCB Design

By Vish7
•
updated over 5 years ago by Lock2002

3 replies • 12834 views
Discussion

Cant create netlist in capture cis

Category: PCB Design

By desertbird
•
updated over 5 years ago by Alok Tripathi

3 replies • 12204 views
Discussion

can't route differential net

Category: PCB Design

By pupradar
•
updated over 5 years ago by AvengerThanos

3 replies • 2304 views
Discussion

difference between the 4 layer & 6 layer

Category: PCB Design

By Sutha
•
updated over 5 years ago by AvengerThanos

1 replies • 2130 views

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