Stats

  • Locked Locked
  • Replies 5
  • Subscribers 63
  • Views 14638
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Noise aware PLL design flow

sriram123
Hi, I use a collpitts topology for my VCO. While attempting to extract the model of the VCO, I can't give any VSS to my circuit because of this topology. So I get an error when I run PSS/PNOISE. I guess the PLL design flow was designed for LC-VCOs. Is there any work around for the problem? Thanks Sriram

  • Sriram,

    What was the precise error? A few pictures might help. I don't thing there's any reason why you can't use a Collpitts oscillator with this flow. You probably need to have the vco_vss source on your testbench, and to create a Vss pin on your "DUT", even if it is not used.

    Regards,

    Andrew.

  • In the collpitts topology, there is no room for a VCO drive or VSS. So conceptually I can't place VSS probe in the testbench which gives me an error. On the other hand, in LC VCO topology, you need to give a tail current or drive to the VCO due to which you have VSS. Can I just connect the ground node to VSS in this case?

  • You can still have it in the testbench but not connected to anything. That's what I was suggesting. You also didn't post the error as I requested. As I said before, pictures would help. 

    Regards,

    Andrew.

  • Thanks I did as you told and connected VSS to noconnection. The PSS runs for a long time and then returns me this error. I have attached the screenshot. Please help Sriram

  •  Hir Sriram,

    The error message gave an important clue...you ran out of memory.  Please type in an xterm 

    spectre -h rfmemory 

     like it suggests in the error message.  There are a list of suggestions for you to go through.  If you continue to have difficulty, I suggest contacting Cadence Customer Support.

     

    best regards,

    Tawna

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.