Maybe many RF & IC designers must be suffer from jitter calculation from phase noise like me.
I read almost all the major documents in google(e.g. Jitter measurements using SpectreRF Application note)
However I can't find any explicit answer or solution about jitter calculation.
Can anybody help me understand the jitter calculation?
My question is simple.
How can I decide the phase noise integration range to calculate jitter?(with selecting noise type as jitter in pnoise)
In many papers, the range was selected 1kHz(10kHz)~10MHz. What's the reason?
In ADI's application note(for ADC), the range was selected 100~2*Fout(i.e. twice of sampling frequency)
Although there are many documents about it, I'm still confused.
Why the phase noise in high frequency is not integrated??
How can I select the low-frequency limit and high-frequency limit for RMS jitter calculation?
Followings are other questions
1) in PSS simulation
-Output harmonics:Number of harmonics
If I am right, the number of harmonics means how many harmonics will be consisted in PSS analysis.
When smaller number used, more noise folded into low frequency. right?? If I'm wrong please point out.
2) in PNOISE simulation
-Output Frequency sweep range
I can't understand this parameter. Even in spectreRF manual, there's no explanation about this.
If I make a free running oscillator 100MHz, what frequency has to be stop frequency? 50MHz? 200MHz?
I selected start frequency to 1Hz
Maximum sidebands determines the noise folding range
If one sets it 7, noise at higher frequency than 7th sideband will be folded into 1~7 sidebands. right?
Thank you for reading
Choosing the frequency range for integration is dependent on your application and what spec you're trying to meet - it depends on the bandwidth of the system. For a driven system (or when using PMjitter mode for autonomous) you should integrate beyond half the PSS fundamental because you would double count the noise (due to the ideal sampler included in the simulation).
In your other questions, question 1 - the number of harmonics in the PSS solution. When using shooting, this is not so important, because the PSS solution contains enough data to represent the solution for at least 40 harmonics by default (or 4 times the highest harmonic asked for if that is greater). Only if you want to include noise from high multiples of the PSS fundamental would you need to worry about this (and even then using the maxacfreq option on the options form could be an alternative way to handle this). With harmonic balance however, you have to include enough harmonics to represent the solution accurately, and also to include all the harmonics around which there will be significant noise contributions. It certainly does not (in either case) mean that fewer harmonics will include more noise.
For the second question, it's the frequency range that you wish to analyze the noise over. The curves will be plotted from A to B where A and B are the limits of your sweep. The bigger the range, the more calculations the simulator has to do.
For sidebands, you need to set this high enough to include all the significant noise contributions. It will only include the noise contributions from sidebands around multiples of the PSS fundamental, up to the limit that you give. Any higher frequency noise contributors will be ignored (so they won't get folded in). Essentially the simulator needs to compute the noise at source at each of the sidebands, and then compute the transfer function from that frequency to the output frequency, and then sum up the noise powers at the output. So it has to have some idea over what range of sidebands to include the noise.
Maybe reading this paper Introduction to RF simulation and its application might help?
You might also want to take a look at http://www.designers-guide.org/Forum/YaBB.pl?num=1224609785 .
Thank you for your detailed reply.
It made me clarify the concept of PSS and PNOISE simulation, especially the meaning of number of harmonics, maximum sidebands, pnoise frequency sweep range.
Well, still I'm confused about phase noise integration range to extract jitter.
Assume one designs a free running VCO and this VCO drives ADC's sample & hold circuit.
Output frequency of VCO is 10MHz and ADC's maximum input frequency is 100kHz.
In my opinion, the maximum offset frequency(upper limit of phase noise integration) of VCO which affect ADC's input is 100kHz.
However, in ADI's application note MT-008(Converting Oscillator Phase Noise to Time Jitter), Walt said that phase noise integration has to be performed up to twice of sampling frequency. From Walt's note, maximum offset frequency is 20MHz.
The simulation results are quite different between above methods.
I'm not sure which is correct.
Can you give me some hints?
Thank you for your reply.
I read suggested posts and found your answer.(http://www.designers-guide.org/Forum/YaBB.pl?num=1092399689/22#22 reply #20)
In this post, you mean the frequency sweep range of pnoise simulation for driven circuit is 0Hz(or very low freq.)~Fout/2. Am I right?
Maybe, it'll be same in autonomous circuit(e.g. VCO).
If so, how can I choose phase noise integration range?
As you replied to the post "http://www.designers-guide.org/Forum/YaBB.pl?num=1092399689 reply #7", I found following comment in your suggested document.
"Determine c by choosing Δf well above the corner frequency ( fc) to avoid ambiguity and well below 'fo' to avoid the noise from other sources that occur at these frequencies."
Is that means phase noise integration range is from at least 'fc' to at most 'fo'?
From above comment, phase noise by flicker noise (1/f^3 band) does not affect as jitter. Am I right?
Can you explain with an example like my previous reply?
When output frequency of VCO is 10MHz and maximum input frequency of ADC is 100kHz, how should I decide phase noise integration range?
Following your suggested document, if in the simulation result, flicker corner frequency 'fc' were 100kHz, the phase noise integration range has to be 100kHz~10MHz. Am I right??
In pnoise jitter analysis, you always must integrate from 0 Hz to f0/2, where f0 is the fundamental frequency (or "beat frequency") of the pss analysis. This is also true for autonomous circuits. However, the long-term jitter of autonomous circuits is infinite. Only the k-cycle jitter Jc is meaningful for an autonomous circuit (see http://www.designers-guide.org/Forum/YaBB.pl?num=1224609785/9#9). Make sure to select PM jitter (not FM jitter) in your pnoise jitter simulation setup if you have an autonomous circuit.
The value of k that you should use for Jc depends on your application. It could for example be the maximum number of consecutive samples that you want to acquire with your ADC.
The frequencies fc and fo have nothing to do with integration. They simply specify the range that you should use to determine the parameter c of the equation.