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Best way to do blind/buried RF vias?

jayk314

I have some RF nets routed on internal layers.  The layer transitions typically involve a number of micro-vias (i.e. 1-2, 2-3, etc.) and sometimes buried vias.  In either case, I often need to clear out antipads on the layers above and below the via capture pads to get rid of extra capacitance.  For example, if I'm going from L2->L3 and I have ground plane on L1 and L4 I'd need anti-pads on L1 and L4.

The way I've been doing this is to create, say, a b/b via in the Pad Editor from L2->L3 and then manually adding voids on the PCB on L1 and L4.  This is tedious and error-prone, and it's a pain if I have to move that via later.  I can create the via in the Pad Editor with the anti-pads (but no Regular Pad) defined on L1 and L4, but then the hole for that via is generated in the L1-4 drill file, not in the L2-3 drill file as it should be.

Can anyone think of a better way to do this?

  • I have run into that exact issue and don't have an easy solution.  If have not tried this but you might be able to generate a symbol that has pads on L2 & L3 only but being a symbol it would need to exist in the netlist as well... hopefully someone else has a better solution!

  • If you are using 17.2 then you can define the BBVia directly in padstack editor, add the layers you need and you can add keepout openings above and below.

  • in reply to steve

    When I try to set Keep Outs on adjacent layers it appears to work, but it doesn't 'stick'.  The image below shows me setting those, but then when I save and reload the pad the Keep Out field gets reset to None.  I've tried both just setting it for the BEGIN LAYER and setting for both TOP (which is the name of L1 in my design) and BEGIN.

  • in reply to jayk314

    So when you try and save the pad you will see a warning saying that the keepout will be removed if there are no pad definitions on BEGAN and END layers so just add a small value for thermal and anti pad (say 1 thou so its smaller than the drill size) and then the keepout layers will remain.

  • in reply to steve

    Thanks.  That works.  But then the Pad shows up in PCB Editor as going from 1:4 and when I generate the drill files it puts that hole in the 1-4 file even though there is no regular pad on L1 or L4.

    This is really a bug... PCB Editor should be checking if there is a REGULAR pad on each layer for the purpose of determining which drill pair a pad belongs to.  But it's making this determination if there is ANY pad on a layer.  At very least there should be an option to specify how the drill-file generation handles this.

    Going back to my original post, I wonder how people handle this when they have large number of RF b/b vias that need to have anti-pads on adjacent layers.  I can define a Keepout for the ADJACENT LAYER on the pad, but that doesn't seem to do anything (at least, it doesn't put a void in my planes above/below the via and it doesn't prevent me from routing over the via on adjacent planes).

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