Best practices for thermal pads with vias

Hi there Evan, Normally my preference is to have the physical padstack also include the drill holes. I have found a 12Mil PTH hole to work well, no issues with wicking to bottom side of board. Other advantage is the pad will only have one net associated with it.

Certain manufacturers prefer to not have the whole bonding pad pasted, in such cases I have found it easier to add a shape rectangle over the bonding pad on the paste layer, for example a 4 quadrant style. Idea being to make sure on a large bonding pad that too much paste gets applied.

Bottom side of board typically has a ground-plane.

I think from a net perspective having the drill holes in the padstack for the bonding pad is the way to go because over on the footprint side of things that pad represents 1 pin. Needless to say also include the corresponding pin at the schematic level so you can tie in a ground net.

All the best.

I forgot to mention the paste layer (stencil) above. Added.

Thanks! Would it be possible to share an example footprint? I'm not sure I got everything you wrote above and I'm sure that would be very clear.

Evan,

First off-- No need to thermal relief vias because you are not soldering anything to them. For the library pads stacks, you may want to try this approach to gain better control over thermal relief needs. Especially, on a case by case bases.

FYI, our company designs power boards which require thermal reliefs because of the high current requirements. So, I know this works.

1. Remove all or any thermal reliefs assigned to pad stacks within your library. --Not required.

2. In the PCB.Editor-- Setup relief parameters to control how copper flooding forms around thru hole pads. Your option here. Meaning, if all your thru hole parts are buried in heavy copper then, by all means, allow for some type of thermal reliefs.

On pads not requiring reliefs you can just pull back the copper fills by reshaping the copper. Or, add copper voids around those exceptions. After you pull back the copper just hook up the pads with a copper trace.

3. For SMD's Disable reliefs unless you want tombstoning parts during the soldering process. On those real big SMD pads that may require some type of relief. Just add your own style relief manualy via copper traces.

Cheers 

Hi Evan, what I was alluding to is using the "Multi Drill" capability that's built into the padstack creation tool. You basically make your bonding pad a multi drill pad. Here is a picture of a regulator part where the pad  contains multiple drills embedded in the pad.

You can see how pad 2 contains those multi drills. A word of caution. Certain parts such as the one above have pin 2 or that bonding pad connected to VCC. In such a case you would want
to have pads defined on all layers otherwise your going to have shorts.

Here is another pic of the actual padstack setup.

If you notice the padstack does not contain a "PasteMask_top" this is because in this particular part I needed more control over how the paste got applied. To accomplish this I used a shape on the paste mask layer instead of creating it within the actual padstack.

One last pic. Have a look at the first pic again. You will notice the drills are not optimal. You can offset the drill pattern too in the padstack editor. Here is the pic showing that.

So a few more drills are added ( Proably Over Kill ) and the drills have a Y offset by -30. The offset is very handy. It allows to make things more concentric.

In the above examples there are no thermal ties. These drills get plated and they are direct connect. Thermal ties are only applicable to make removing the parts easier. For connectors they are fine but on chips or regulators like the one above I never use them.

Hopefully the above will help you out or give you a few ideas.

All the best.