Dynamic shape flood spacing

if only it actually worked...

Well, Allegro has a DRC (reference plane continuity) to catch plane gaps adjacent to traces.. 

This is the fight between fab QA and EMC/EE engineers.  Reference plane gaps at some point lead to bit-error rates going up.

Still don't understand why this is considered an acid trap without an acute angle.

not an acid trap, just not manufacturable. If they fab as-is the gap will not be there or with such small gaps the resist could come off and cause issues elsewhere. Plus we've beat our fabricators up so much that they are afraid to make any decisions without our approval. 

My condolences as you could have this dialed in, but fabricators have varying etch aggressiveness as a chemical process.  Add electroplating to this layer and... 

Aerospace?   Usually you have lower risk with a slightly bigger copper gap.    Have to ask, what industry would spend time on this?

Exactly. And who else would have the money to spend time on this? LOL