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  3. Signal integrity verification at 10GHz

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Signal integrity verification at 10GHz

Pavel47
Pavel47 over 13 years ago

Hello,

Is Allegro PCB SI (or some other tool from 16.5) capable to check signal integrity of a complex board at 10GHz ?

Or one should export the board file to HyperLynx and check SI with the last one ?

Thanks in advance.

Pavel.

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  • Robert Finley
    Robert Finley over 13 years ago

    The microwave engineers I've worked with relied heavily on a 3D EM field solver environment like ANSYS/HFSS or Agilent ADS (Allegro PCB-RF is designed to integrate with ADS).   I fear PSPICE tools might not be the best tool to model parasitics at this frequency.

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  • Dennis Nagle
    Dennis Nagle over 13 years ago

     Yes, PCB SI can handle verification at these data rates. There are multiple capabilities in the tool set including a fullwave solver, high capacity channel simulation and source sync bus analysis in addition to traditional SI simulation.

     Regards,

    Dennis

     

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  • Pavel47
    Pavel47 over 13 years ago

    Thanks Dennis. Is there some document where I could find detailed procedure how to proceed ?

    In particular I want to estimate the signal that is generated by a FPGA on the PCB1, then is propagated from FPGA pin to the connector CONA male (PCB1), then retrived on the PCB2 via CONA female, then propageted via PCB2 until optical transceiver CONB.

    What additional information (beside layout) must I have in order to accomplish this task:

    1. IBIS model for FPGA, that describes electromagnetic property of the drive pin (as well as ?) its driving capability
    2. IBIS model of CONA
    3. IBIS model of the optical transceiver CONB

    Regards.

    Pavel.

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  • Dennis Nagle
    Dennis Nagle over 13 years ago

     Hi Pavel,

     There is a thread on here with a PCB SI tutorial - it's dated but is a good place to start.

    Depending on where you are with your layout, you may want to start doing some exploration with SigXplorer first. You are certainly on the right track with getting models for your devices. For 1, IBIS is certainly the way to go. I have no experience with 3 but there may be IBIS available. For 2, your more likely to get an S-param model of the connector.

    Pieceing all of these together is simple in SigXplorer and you can use ideal interconnect, trace models or even start with an extracted topology from a design. If you want to simulate directly from the layout however, you'll need to construct a designlink to connect the two pcb designs together.

     Regards,
    -Dennis

     

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  • Pavel47
    Pavel47 over 13 years ago

    Hello Dennis,

    Thanks for response. Could you, please, put the link to the mentionned tutorial.

    Concerning IBIS for FPGA, should I request it from manufacturer (Altera) or it's placed somewhere in the install directories.

    Regards.

    Pavel.

    P.S. I suppose that IBIS FPGA model contains whole necessary data including output pin drive strength.

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