• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      oldmouldy
      oldmouldy 45 Points
    • 2
      EDAHut
      EDAHut 25 Points
    • 3
      karthikeyank
      karthikeyank 20 Points
    • 4
      LogicNet
      LogicNet 16 Points
    • 5
      Zhifeng Jin
      Zhifeng Jin 15 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,478 Points
    • 2
      oldmouldy
      oldmouldy 10,615 Points
    • 3
      DavidJHutchins
      DavidJHutchins 5,231 Points
    • 4
      excellon1
      excellon1 4,103 Points
    • 5
      redwire
      redwire 4,093 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    Making a symbol from scrach

    Category: PCB Design

    By Dennis H

    •

    updated over 16 years ago by Dennis H

    15 replies • 21604 views
  • Discussion

    Simple question about analog behaviour modeling

    Category: PCB Design

    By Emmanuele

    •

    started over 16 years ago

    0 replies • 13488 views
  • Discussion

    generating a wave with Variable voltage n frequency using PSpice

    Category: PCB Design

    By MAAC

    •

    started over 16 years ago

    0 replies • 13793 views
  • Discussion

    Synchronizing DE HDL and part table file

    Category: PCB Design

    By ahmetozsoy

    •

    updated over 16 years ago by MAAC

    6 replies • 17612 views
  • Discussion

    DRC error Orcad Capture

    Category: PCB Design

    By JGeens

    •

    updated over 16 years ago by Shiv kumar

    1 replies • 17983 views
  • Discussion

    Defining Copper thickness

    Category: PCB Design

    By tltoth

    •

    updated over 16 years ago by redwire

    2 replies • 16036 views
  • Discussion

    Importing new schematic changes removed componets and moved RF traces.

    Category: PCB Design

    By Clark1502

    •

    updated over 16 years ago by redwire

    3 replies • 14588 views
  • Discussion

    wait the design is loaded to run a SKILL routine

    Category: Allegro X PCB Editor

    By willbi

    •

    updated over 16 years ago by willbi

    4 replies • 15619 views
  • Discussion

    proposal feedback ( shapes visibility )

    Category: PCB Design

    By ahmetozsoy

    •

    updated over 16 years ago by redwire

    3 replies • 14970 views
  • Discussion

    Updating constraint set in board file to schematic

    Category: PCB Design

    By girish

    •

    updated over 16 years ago by Khurana

    1 replies • 14947 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information