• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      steve
      steve 25 Points
    • 2
      excellon1
      excellon1 20 Points
    • 3
      HirokiJEM
      HirokiJEM 16 Points
    • 4
      kevcon
      kevcon 15 Points
    • 4
      Robert Finley
      Robert Finley 15 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,898 Points
    • 2
      oldmouldy
      oldmouldy 11,050 Points
    • 3
      eDave
      eDave 7,661 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,226 Points
    • 5
      redwire
      redwire 5,193 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    cdc2fab(fabmaster/unicam) doesn't run in v16.2

    Category: PCB Design

    By WESTFELDT

    •

    updated over 16 years ago by Grungy Remnant

    2 replies • 1642 views
  • Discussion

    SPB installation in linux RHEL3

    Category: PCB Design

    By MAAC

    •

    updated over 16 years ago by oldmouldy

    2 replies • 14312 views
  • Discussion

    Controlling hierarchical design net names

    Category: PCB Design

    By AmarAgnihotri

    •

    updated over 16 years ago by AmarAgnihotri

    2 replies • 15241 views
  • Discussion

    Failed to export partial ODB !!!

    Category: PCB Design

    By Ineedhelp

    •

    updated over 16 years ago by Rik Lee

    7 replies • 17677 views
  • Discussion

    Alt symbol

    Category: PCB Design

    By Mikie

    •

    updated over 16 years ago by EvanShultz

    4 replies • 15842 views
  • Discussion

    net scheduling in 16.2

    Category: PCB Design

    By padmaster

    •

    updated over 16 years ago by padmaster

    7 replies • 15319 views
  • Discussion

    two step to update component value?

    Category: PCB Design

    By Shalongbasi

    •

    started over 16 years ago

    0 replies • 12558 views
  • Discussion

    Rotating Parts in PCB Editor

    Category: PCB Design

    By EllieRye

    •

    updated over 16 years ago by justintesmer

    6 replies • 25441 views
  • Discussion

    Off-page connector name overwrites global net names

    Category: PCB Design

    By tltoth

    •

    updated over 16 years ago by tltoth

    2 replies • 15281 views
  • Discussion

    How to start Skill in Orcad PCB editor 16.2

    Category: PCB Design

    By Prasanna

    •

    updated over 16 years ago by Ejlersen

    13 replies • 19946 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information