• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. PCB Design & IC Packaging (Allegro X)

PCB Design & IC Packaging (Allegro X)

CDNS Forum PCB Categories

Allegro X PCB Editor

Allegro X Capture CIS

Allegro X System Capture (EE Cockpit)

Allegro X Pulse & EDM

Allegro X APD

Allegro X Scripting - Skill

Allegro X Scripting - TCL

PCB Design Archive

Design Entry HDL

PSpice

Licensing & Installation

  • Leaderboard

    PCB Design

    • 1
      steve
      steve 25 Points
    • 2
      Ejlersen
      Ejlersen 20 Points
    • 2
      excellon1
      excellon1 20 Points
    • 4
      HirokiJEM
      HirokiJEM 16 Points
    • 5
      Robert Finley
      Robert Finley 15 Points
  • Leaderboard

    PCB Design

    • 1
      steve
      steve 15,903 Points
    • 2
      oldmouldy
      oldmouldy 11,035 Points
    • 3
      eDave
      eDave 7,651 Points
    • 4
      DavidJHutchins
      DavidJHutchins 5,226 Points
    • 5
      redwire
      redwire 5,193 Points

Feedback, Suggestions, and Questions

Provide feedback on the forums or any other part of the site. Questions and suggestions welcome.

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List

Latest Posts

  • Discussion

    power integrity - VRM MODEL

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    3 replies • 2176 views
  • Discussion

    Transfering attributes from CIS to Layout

    Category: PCB Design

    By archive

    •

    started over 17 years ago

    0 replies • 12619 views
  • Discussion

    net line spacing

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    2 replies • 13543 views
  • Discussion

    DFA Audit

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    10 replies • 17492 views
  • Discussion

    Adding Ground Loop around Board Area

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    1 replies • 13123 views
  • Discussion

    what is the functin of "Manufacturing / cut_masks"?

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    1 replies • 4976 views
  • Discussion

    SPB 15.7 on Windows Vista

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    4 replies • 14203 views
  • Discussion

    netlist compare schematic vs layout

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    2 replies • 14430 views
  • Discussion

    Tear drop routing

    Category: PCB Design

    By archive

    •

    updated over 17 years ago by archive

    5 replies • 16365 views
  • Discussion

    How to Load Encrypted skill

    Category: Allegro X PCB Editor

    By archive

    •

    updated over 17 years ago by archive

    3 replies • 14498 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information